SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 976
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SAM3X8C
Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
- Current page: 976 of 1465
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37.14.16 HSMCI DMA Configuration Register
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• OFFSET: DMA Write Buffer Offset
This field indicates the number of discarded bytes when the DMA writes the first word of the transfer.
• CHKSIZE: DMA Channel Read and Write Chunk Size
The CHKSIZE field indicates the number of data available when the DMA chunk transfer request is asserted.
• DMAEN: DMA Hardware Handshaking Enable
0: DMA interface is disabled.
1: DMA Interface is enabled.
Note:
• ROPT: Read Optimization with padding
0: BLKLEN bytes are moved from the Memory Card to the system memory, two DMA descriptors are used when the trans-
fer size is not a multiple of 4.
1: Ceiling(BLKLEN/4) * 4 bytes are moved from the Memory Card to the system memory, only one DMA descriptor is used.
976
976
31
23
15
–
–
7
–
To avoid unpredictable behavior, DMA hardware handshaking must be disabled when CPU transfers are performed.
SAM3X/A
SAM3X/A
Value
HSMCI_DMA
0x40000050
Read-write
0
1
30
22
14
–
–
6
–
29
21
13
–
–
–
5
–
Name
CHKSIZE
1
4
ROPT
28
20
12
–
–
4
“HSMCI Write Protect Mode Register” on page
27
19
11
–
–
–
3
–
1 data available
4 data available
Description
26
18
10
–
–
–
2
–
25
17
–
–
9
–
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
OFFSET
978.
DMAEN
24
16
–
–
8
0
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