SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 212

• Manufacturer Part Number: SAM3X8C
• Manufacturer: Atmel Corporation

Read
Region
Reserved
Should Be One (SBO)
Should Be Zero (SBZ)
Should Be Zero or Preserved (SBZP)
Thread-safe
Thumb instruction
Unaligned
Undefined
Unpredictable (UNP)
Warm reset
Word
212
212
SAM3X/A
SAM3X/A
Reads are defined as memory operations that have the semantics of a load. Reads include the
Thumb instructions LDM, LDR, LDRSH, LDRH, LDRSB, LDRB, and POP.
A partition of memory space.
A field in a control register or instruction format is reserved if the field is to be defined by the
implementation, or produces Unpredictable results if the contents of the field are not zero. These
fields are reserved for use in future extensions of the architecture or are implementation-specific.
All reserved bits not used by the implementation must be written as 0 and read as 0.
Write as 1, or all 1s for bit fields, by software. Writing as 0 produces Unpredictable results.
Write as 0, or all 0s for bit fields, by software. Writing as 1 produces Unpredictable results.
Write as 0, or all 0s for bit fields, by software, or preserved by writing the same value back that
has been previously read from the same field on the same processor.
In a multi-tasking environment, thread-safe functions use safeguard mechanisms when access-
ing shared resources, to ensure correct operation without the risk of shared access conflicts.
One or two halfwords that specify an operation for a processor to perform. Thumb instructions
must be halfword-aligned.
A data item stored at an address that is not divisible by the number of bytes that defines the data
size is said to be unaligned. For example, a word stored at an address that is not divisible by
four.
Indicates an instruction that generates an Undefined instruction exception.
You cannot rely on the behavior. Unpredictable behavior must not represent security holes.
Unpredictable behavior must not halt or hang the processor, or any parts of the system.
Also known as a core reset. Initializes the majority of the processor excluding the debug control-
ler and debug logic. This type of reset is useful if you are using the debugging features of a
processor.
A 32-bit data item.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12