SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 188
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SAM3X8C
Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
- Current page: 188 of 1465
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11.21.13 Memory Management Fault Address Register
• ADDRESS
When the MMARVALID bit of the MMFSR is set to 1, this field holds the address of the location that generated the memory
management fault
When an unaligned access faults, the address is the actual address that faulted. Because a single read or write instruction
can be split into multiple aligned accesses, the fault address can be any address in the range of the requested access size.
Flags in the MMFSR indicate the cause of the fault, and whether the value in the MMFAR is valid. See
ment Fault Status Register” on page
11.21.14 Bus Fault Address Register
• ADDRESS
When the BFARVALID bit of the BFSR is set to 1, this field holds the address of the location that generated the bus fault
When an unaligned access faults the address in the BFAR is the one requested by the instruction, even if it is not the
address of the fault.
Flags in the BFSR indicate the cause of the fault, and whether the value in the BFAR is valid. See
ter” on page
188
188
31
23
15
31
23
15
7
7
SAM3X/A
SAM3X/A
183.
30
22
14
30
22
14
6
6
The MMFAR contains the address of the location that generated a memory management fault.
See the register summary in
The BFAR contains the address of the location that generated a bus fault. See the register sum-
mary in
Table 11-30 on page 165
182.
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
Table 11-30 on page 165
ADDRESS
ADDRESS
ADDRESS
ADDRESS
ADDRESS
ADDRESS
ADDRESS
ADDRESS
for its attributes. The bit assignments are:
27
19
11
27
19
11
3
3
for its attributes. The bit assignments are:
26
18
10
26
18
10
2
2
“Bus Fault Status Regis-
25
17
25
17
9
1
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
“Memory Manage-
24
16
24
16
8
0
8
0
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