AD6643 Analog Devices, AD6643 Datasheet - Page 32
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AD6643
Manufacturer Part Number
AD6643
Description
Dual IF Receiver
Manufacturer
Analog Devices
Datasheet
1.AD6643.pdf
(36 pages)
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Quantity
Price
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Manufacturer:
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Manufacturer:
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Quantity:
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AD6643
Addr
(Hex)
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x24
0x25
Digital Feature Control Registers
0x3A
0x3C
0x3E
1
The channel index register at Address 0x05 should be set to 0x03 (default) when writing to Address 0x00.
Register
Name
User Test
Pattern 2 LSB
(global)
User Test
Pattern 2
MSB (global)
User Test
Pattern 3 LSB
(global)
User Test
Pattern 3
MSB (global)
User Test
Pattern 4 LSB
(global)
User Test
Pattern 4
MSB (global)
BIST
signature
LSB (local)
BIST
signature
MSB (local)
Sync control
(global)
NSR control
(local)
NSR tuning
word (local)
Bit 7
(MSB)
Open
Open
Open
Bit 6
Open
Open
Open
Bit 5
Open
Open
Equations for the tuning word are dependent on the NSR mode
See the
User Test Pattern 2[15:8]
User Test Pattern 3[15:8]
User Test Pattern 4[15:8]
User Test Pattern 2[7:0]
User Test Pattern 3[7:0]
User Test Pattern 4[7:0]
Bit 4
Open
Open
BIST signature[15:8]
BIST signature[7:0]
Rev. A | Page 32 of 36
Noise Shaping Requantizer (NSR)
Bit 3
Open
NSR tuning word
000 = 22% BW mode
001 = 33% BW mode
Bit 2
Open
NSR mode
Clock
divider
sync enable
0 = off
1 = on
Bit 1
section
Bit 0
(LSB)
Master
sync
enable
0 = off
1 = on
NSR
enable
0 = off
1 = on
Default
Value
(Hex)
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x1C
Data Sheet
Default Notes/
Comments
Read only
Read only
Control register
to synchronize
the clock divider
Noise shaping
requantizer (NSR)
controls
NSR
frequency
tuning word