AD664 Analog Devices, AD664 Datasheet



Manufacturer Part Number
Monolithic 12-Bit Quad DAC
Analog Devices

Specifications of AD664

Resolution (bits)
Dac Update Rate
Dac Settling Time
Max Pos Supply (v)
Dac Type
Voltage Out
Dac Input Format

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Part Number
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13 888
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2 857
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2 857
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1 045
Part Number:
1 000
The AD664 is four complete 12-bit, voltage-output DACs on
one monolithic IC chip. Each DAC has a double-buffered input
latch structure and a data readback function. All DAC read and
write operations occur through a single microprocessor-compatible
I/O port.
The I/O port accommodates 4-, 8- or 12-bit parallel words al-
lowing simple interfacing with a wide variety of microprocessors.
A reset to zero control pin is provided to allow a user to simulta-
neously reset all DAC outputs to zero, regardless of the contents
of the input latch. Any one or all of the DACs may be placed in
a transparent mode allowing immediate response by the outputs
to the input data.
The analog portion of the AD664 consists of four DAC cells,
four output amplifiers, a control amplifier and switches. Each
DAC cell is an inverting R-2R type. The output current from
each DAC is switched to the on-board application resistors and
output amplifier. The output range of each DAC cell is pro-
grammed through the digital I/O port and may be set to unipo-
lar or bipolar range, with a gain of one or two times the reference
voltage. All DACs are operated from a single external reference.
The functional completeness of the AD664 results from the
combination of Analog Devices’ BiMOS II process, laser-trimmed
thin-film resistors and double-level metal interconnects.
1. The AD664 provides four voltage-output DACs on one chip
2. The output range of each DAC is fully and independently
3. Readback capability allows verification of contents of the in-
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Four Complete Voltage Output DACs
Data Register Readback Feature
“Reset to Zero” Override
Multiplying Operation
Double-Buffered Latches
Surface Mount and DIP Packages
MIL-STD-883 Compliant Versions Available
Automatic Test Equipment
Process Control
Disk Drives
offering the highest density 12-bit D/A function available.
ternal data registers.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
4. The asynchronous RESET control returns all D/A outputs
5. DAC-to-DAC matching performance is specified and tested.
6. Linearity error is specified to be 1/2 LSB at room tempera-
7. DAC performance is guaranteed to be monotonic over the
8. Readback buffers have tristate outputs.
9. Multiplying-mode operation allows use with fixed or vari-
10. The AD664 is available in versions compliant with MIL-
to zero volts.
ture and 3/4 LSB maximum for the K, B and T grades.
full operating temperature range.
able, positive or negative external references.
STD-883. Refer to the Analog Devices Military Products
Databook or current AD664/883B data sheet for detailed
28-Pin DIP Package
44-Pin Package
12-Bit Quad DAC

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AD664 Summary of contents

Page 1

... Any one or all of the DACs may be placed in a transparent mode allowing immediate response by the outputs to the input data. The analog portion of the AD664 consists of four DAC cells, four output amplifiers, a control amplifier and switches. Each DAC cell is an inverting R-2R type. The output current from each DAC is switched to the on-board application resistors and output amplifier ...

Page 2

... AD664–SPECIFICATIONS Model RESOLUTION ANALOG OUTPUT 1 Voltage Range UNI Versions BIP Versions Output Current Load Resistance Load Capacitance Short-Circuit Current ACCURACY Gain Error Unipolar Offset 3 Bipolar Zero 4 Linearity Error Linearity MIN MAX Differential Linearity Differential Linearity MIN MAX Gain Error Drift Unipolar +10 V Mode Bipolar – ...

Page 3

... Exposure to absolute 10 V and V maximum rating conditions for extended periods may affect device reliability. REF REF (V – –3– AD664 KN/KP/BD/BJ/BE/TD/TE Min Typ Max Units * Volts * * Volts * ...

Page 4

... EE 28-Pin Versions The 28-pin versions are dedicated versions of the 44-pin AD664. Each offers a reduced set of features from those offered in the 44-pin version. This accommodates the reduced number of package pins available. Data is written and read with 12-bit words only. Output range and mode select functions are also not available in 28-pin versions ...

Page 5

... MONOTONICITY: A DAC is said to be monotonic if the out- put either increases or remains constant for increasing digital inputs such that the output will always be a nondecreasing func- tion of input. All versions of the AD664 are monotonic over their full operating temperature range. DIFFERENTIAL LINEARITY: Monotonic behavior requires that the differential linearity error be less than 1 LSB both well as over the temperature range of interest ...

Page 6

... CC EE analog ground. Driving the Reference Input The reference input of the AD664 can have an impedance as low as 1 Therefore, the external reference voltage must be able to source load current. Suitable choices include the 5 V AD586, the 10 V AD587 and the 8.192 V AD689 ...

Page 7

... The total rms noise is approximately one fifth the visual peak-to-peak noise. DIGITAL INTERFACE As Table II shows, the AD664 makes a wide variety of operating modes available to the user. These modes are accessed or pro- grammed through the high speed digital port of the quad DAC. ...

Page 8

... Mode NOTES X = Don’t Care. 1 For 44-pin versions only. Allow the AD664 to be addressed in 4-bit nibble, 8-bit byte or 12-bit parallel words. 2 For MS, TR 1st write occurs. The following sections detail the timing requirements for various data loading schemes. All of the timing specifica- tions shown assume ...

Page 9

... Figure 14. Load and Update Multiple DACs SELECTING GAIN RANGE AND MODES (44-PIN VERSIONS) The AD664’s mode select feature allows a user to configure the gain ranges and output modes of each of the four DACs. On-board switches take the place eight external relays that would normally be required to accomplish this task ...

Page 10

... Timing Transparent Operation (44-Pin Versions) Transparent operation allows data from the inputs of the AD664 to be transferred into the DAC registers without the intervening step of being latched into the first rank of latches. Two modes of transparent operation exist, the “partially trans- parent” mode and a “fully transparent” mode. In the “partially transparent” ...

Page 11

... REV. OUTPUT DATA Two types of outputs may be obtained from the internal data registers of the AD664 chip, mode select and DAC input code data. Readback data may be in the same forms in which it can be entered; 4-, 8-, and 12-bit wide words (12 bits only for 28-pin versions) ...

Page 12

... AD664. MC6801 Interface In Figures 25a–25d, we illustrate a few of the various methods that can be used to connect an AD664 to the popular MC6801 microprocessor. In each of these cases, the MC6801 is intended to be configured in its expanded, nonmultiplexed mode of operation. In this mode, the MC6801 can address 256 bytes of external memory over 8-bit data (Port 3) and 8-bit address (Port 4) buses ...

Page 13

... MC6801, providing a total of eight 12-bit, software program- mable DACs. Again, the three least significant bits of address are used to select the on-chip registers of the AD664. IOS and E, as well as a fourth address bit, are decoded to provide the appropriate CS signals. Four address and five I/O lines remain uncommitted ...

Page 14

... Figure 26. frees up LOGIC 8051 Interface Figure 26 shows the AD664 combined with an 8051 controller , LOGIC chip. Three LSBs of address provide the quad and DAC select signals. Control signals from Port 1 select various operating modes such as readback, mode select and reset as well as pro- viding the LS signal ...

Page 15

... IBM PC* Interface Figure 27 illustrates a simple interface between an IBM PC and an AD664. The three least significant address bits are used to select the Quad and DAC. The next two address bits are used for LS and MS. In this scheme, a 12-bit input word requires two load cycles, an 8-bit word and a 4-bit word. Another write *IBM trademark of International Business Machines Corp ...

Page 16

... AD664 Table III details the memory locations and addresses used by this interface. HEX 300 301 302 303 304 305 306 307 308 309 30A 30B 30C 30D 30E 30F 310 311 312 313 314 315 316 317 ...

Page 17

... The following IBM PC Basic routine produces four output volt- age ramps from one AD664. Line numbers 10 through 70 de- fine the hardware addresses for the first and second ranks of DAC registers as well as the first and second ranks of the mode select register. Program variables are initialized in line numbers 110 through 130. Line number 170 writes “ ...

Page 18

... AD664 Simple AD664 to MC68000 Interface Figure 28 shows an AD664 connected to an MC68000. In this memory-mapped I/O scheme, the “left-justified” data is written in one 12-bit input word. Four address bits are used to perform the on-chip D/A selection as well as the various operating fea- tures. The R/W signal controls the RD function and system reset controls RST. This scheme can be converted to write “ ...

Page 19

... APPLICATIONS OF THE AD664 “Tester-Per-Pin” ATE Architecture Figure 29 shows the AD664 used in a single channel of a digital test system. In this scheme, the AD664 supplies four individual output voltages. Two are provided to the V puts of the AD345 pin driver I.C. to set the digital output levels. ...

Page 20

... AD664 OUTLINE DIMENSIONS 0.005 (0.13) MIN PIN 1 0.085 (2.16) MAX 0.200 (5.08) 0.125 (3.18 0.250 (6.35) MAX 0.200 (5.08) 0.115 (2.92) 0.022 (0.56) 0.014 (0.36) 0.100 (2.54) MAX 28 15 0.610 (15.49) 0.580 (12.73 1.490 (37.85) MAX 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.026 (0.66) 0.070 (1.78) 0.100 (2.54) PLANE 0.014 (0.36) 0.030 (0.76) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN ...

Page 21

... Figure 34. 44-Lead Ceramic Leaded Chip Carrier, J-Formed Leads [JLCC] (J-44) Dimensions shown in inches and (millimeters) –21– 0.075 (1.91) REF 6 0.020 (0.51) 7 REF  45° 0.028 (0.71) 0.022 (0.56) 17 0.040 (1.02) 18 REF  45° 3 PLACES 0.040 (1.02) 0.020 (0.51) REF REF  45°  45° 3 PLACES PIN 1 INDEX 0.065 (1.65) BOTTOM VIEW AD664 ...

Page 22

... AD664KNZ-BIP 0°C to +70°C AD664KNZ-UNI 0°C to +70°C AD664KP 0°C to +70°C AD664KPZ 0°C to +70°C AD664SD-BIP −55°C to +125°C AD664SD-BIP/883B −55°C to +125°C AD664SD-UNI −55°C to +125°C AD664SD-UNI/883B −55°C to +125°C AD664TD-BIP −55°C to +125°C AD664TD-BIP/883B − ...

Page 23

... REVISION HISTORY 2/12—Rev Rev. D Updated Outline Dimensions ....................................................... 20 Changes to Ordering Guide .......................................................... 21 12/91—Rev Rev. C ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. REV. D D10590-0-2/12(D) –23– AD664 ...

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