AD7606-4 Analog Devices, AD7606-4 Datasheet - Page 8

• Manufacturer Part Number: AD7606-4
• Description: 4-Channel DAS with 16-Bit, Bipolar, Simultaneous Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7606-4

• Resolution (bits): 16bit
• # Chan: 4
• Sample Rate: 200kSPS
• Interface: Par,Ser,SPI
• Analog Input Type: SE-Bip
• Ain Range: Bip 10V,Bip 5.0V
• Adc Architecture: SAR
• Pkg Type: QFP

AD7606/AD7606-6/AD7606-4
Parameter
SERIAL READ OPERATION
FRSTDATA OPERATION
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
SCLK
13
14
15
16
17
18
19
20
21
22
23
24
25
26
4
4
Min
6
6
0.4 t
0.4 t
7
Logic Input Levels)
Limit at T
(0.1 × V
SCLK
SCLK
0.9 × V
Typ
DRIVE
MIN
DRIVE
, T
and
MAX
Max
16
20
25
30
16
21
25
32
22
23.5
17
14.5
11.5
15
20
30
17
23
27
34
22
15
20
25
30
15
20
25
30
16
20
25
30
Min
6
6
0.4 t
0.4 t
7
Logic Input Levels)
Limit at T
(0.3 × V
Rev. C | Page 8 of 36
SCLK
SCLK
0.7 × V
Typ
DRIVE
MIN
DRIVE
, T
and
MAX
Max
19
24
30
37
19
24
30
37
22
20
15
12.5
10
18
23
35
20
26
32
39
22
18
23
30
35
18
23
30
35
19
23
30
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Description
Delay from CS until DB[15:0] three-state disabled
V
V
V
V
Data access time after RD falling edge
V
V
V
V
Data hold time after RD falling edge
CS to DB[15:0] hold time
Delay from CS rising edge to DB[15:0] three-state
enabled
Frequency of serial read clock
V
V
V
V
Delay from CS until D
disabled/delay from CS until MSB valid
V
V
V
Data access time after SCLK rising edge
V
V
V
V
SCLK low pulse width
SCLK high pulse width
SCLK rising edge to D
CS rising edge to D
Delay from CS falling edge until FRSTDATA three-
state disabled
V
V
V
V
Delay from CS falling edge until FRSTDATA high,
serial mode
V
V
V
V
Delay from RD falling edge to FRSTDATA high
V
V
V
V
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
= 2.3 V to 2.7 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
OUT
OUT
OUT
A/D
A/D
A/D
OUT
OUT
OUT
B three-state enabled
B three-state
B valid hold time
Data Sheet