AD6655 Analog Devices, AD6655 Datasheet - Page 31

• Manufacturer Part Number: AD6655
• Description: IF Diversity Receiver
• Manufacturer: Analog Devices

Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the source impedances on each input are matched,
there should be little effect on SNR performance. Figure 51 shows
a typical single-ended input configuration.
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD6655.
The input range can be adjusted by varying the reference voltage
applied to the AD6655, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the sections that follow. The Reference
Decoupling section describes the best practices PCB layout of
the reference.
Internal Reference Connection
A comparator within the AD6655 detects the potential at the
SENSE pin and configures the reference into four possible modes,
which are summarized in Table 15. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 52), setting VREF to 1.0 V. Connecting the
SENSE pin to VREF switches the reference amplifier output to
the SENSE pin, completing the loop and providing a 0.5 V
reference output. If a resistor divider is connected externally
to the chip, as shown in Figure 53, the switch again sets to the
SENSE pin.
Table 15. Reference Configuration Summary
Selected Mode
External Reference
Internal Fixed Reference
Programmable Reference
Internal Fixed Reference
2V p-p
10µF
49.9Ω
Figure 51. Single-Ended Input Configuration
0.1µF
10µF
0.1µF
AVDD
1kΩ
1kΩ
1kΩ
1kΩ
AVDD
R
R
C
SENSE Voltage
AVDD
VREF
0.2 V to VREF
AGND to 0.2 V
VIN+
VIN–
AD6655
Rev. A | Page 31 of 88
Resulting VREF (V)
N/A
0.5
1.0
0
5 .
×
⎛
⎜
⎝
1
+
R2
R1
This puts the reference amplifier in a noninverting mode with
the VREF output defined as follows:
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
⎞
⎟
⎠
(see Figure 53)
VREF
1.0µF
1.0µF
Figure 53. Programmable Reference Configuration
=
0
Figure 52. Internal Reference Configuration
0.1µF
5 .
VIN+A/VIN+B
VIN–A/VIN–B
×
VREF
0.1µF
⎛ +
⎜
⎝
VIN+A/VIN+B
VIN–A/VIN–B
1
SENSE
VREF
SENSE
R2
R1
R2
R1
⎞
⎟
⎠
Resulting Differential
Span (V p-p)
2 × external reference
1.0
2 × VREF
2.0
SELECT
LOGIC
AD6655
SELECT
LOGIC
AD6655
0.5V
CORE
ADC
0.5V
CORE
ADC
AD6655