AD7795 Analog Devices, AD7795 Datasheet - Page 18

• Manufacturer Part Number: AD7795
• Description: 6-Channel, Low Noise, Low Power, 16-Bit Sigma Delta ADC with On-Chip In-Amp and Reference
• Manufacturer: Analog Devices

Specifications of AD7795

• Resolution (bits): 16bit
• # Chan: 6
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7794/AD7795
STATUS REGISTER
RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80
(AD7795)/0x88 (AD7794)
The status register is an 8-bit read-only register. To access the
ADC status register, the user must write to the communications
register, select the next operation to be read, and load Bit RS2,
Bit RS1, and Bit RS0 with 0.
SR7
RDY(1)
Table 16. Status Register Bit Designations
Bit No.
SR7
SR6
SR5
SR4
SR3
SR2 to
SR0
0
0/1
Mnemonic
RDY
ERR
NOXREF
CH2 to CH0
SR6
ERR(0)
Description
This bit is automatically cleared.
This bit is automatically cleared on the AD7795 and is automatically set on the AD7794.
These bits indicate which channel is being converted by the ADC.
Ready Bit for ADC. Cleared when data is written to the ADC data register. The RDY bit is set automatically after the
ADC data register has been read or a period of time before the data register is updated with a new conversion
result to indicate to the user not to read the conversion data. It is also set when the part is placed in power-down
mode. The end of a conversion is also indicated by the DOUT/RDY pin. This pin can be used as an alternative to the
status register for monitoring the ADC for conversion data.
ADC Error Bit. This bit is written to at the same time as the RDY bit. Set to indicate that the result written to the
ADC data register has been clamped to all 0s or all 1s. Error sources include overrange, underrange, or the absence
of a reference voltage. Cleared by a write operation to start a conversion.
No External Reference Bit. Set to indicate that the selected reference (REFIN1 or REFIN2) is at a voltage that is
below a specified threshold. When set, conversion results are clamped to all 1s. Cleared to indicate that a valid
reference is applied to the selected reference pins. The NOXREF bit is enabled by setting the REF_DET bit in the
configuration register to 1. The ERR bit is also set if the voltage applied to the selected reference input is invalid.
SR5
NOXREF(0)
SR4
0(0)
Rev. D | Page 18 of 36
SR3
0/1
Table 16 outlines the bit designations for the status register. SR0
through SR7 indicate the bit locations, with SR denoting that
the bits are in the status register. SR7 denotes the first bit of the
data stream. The number in brackets indicates the power-
on/reset default status of that bit.
SR2
CH2(0)
SR1
CH1(0)
SR0
CH0(0)