AD7795 Analog Devices, AD7795 Datasheet - Page 33

• Manufacturer Part Number: AD7795
• Description: 6-Channel, Low Noise, Low Power, 16-Bit Sigma Delta ADC with On-Chip In-Amp and Reference
• Manufacturer: Analog Devices

Specifications of AD7795

• Resolution (bits): 16bit
• # Chan: 6
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

input also drives the reference voltage for the parts, the effect of
the low frequency noise in the excitation source is removed,
because the application is ratiometric. If the AD7794/AD7795
are used in nonratiometric applications, a low noise reference
should be used.
Recommended 2.5 V reference voltage sources for the
AD7794/AD7795 include the
low noise, low power references. Also, note that the reference
inputs provide a high impedance, dynamic load. Because the
input impedance of each reference input is dynamic, resis-
tor/capacitor combinations on these inputs can cause dc gain
errors, depending on the output impedance of the source
driving the reference inputs.
Reference voltage sources (for example, the ADR391) typically
have low output impedances and are, therefore, tolerant to
having decoupling capacitors on REFIN(+) without introducing
gain errors in the system. Deriving the reference input voltage
across an external resistor means that the reference input sees a
significant external source impedance. External decoupling on
the REFIN pins is not recommended in this type of circuit
configuration.
REFERENCE DETECT
The AD7794/AD7795 include on-chip circuitry to detect if they
have a valid reference for conversions or calibrations when the
user selects an external reference as the reference source. This
feature is enabled when the REF_DET bit in the configuration
register is set to 1. If the voltage between the selected REFIN(+)
and REFIN(–) pins goes below 0.3 V, or either the REFIN(+) or
REFIN(–) inputs are open circuit, the AD7794/AD7795 detect
that they no longer have valid references. In this case, the
NOXREF bit of the status register is set to 1. If the AD7794/
AD7795 are performing normal conversions and the NOXREF
bit becomes active, the conversion results revert to all 1s.
Therefore, it is not necessary to continuously monitor the status
of the NOXREF bit when performing conversions. It is only
necessary to verify its status if the conversion result read from
the ADC data register is all 1s. If the AD7794/AD7795 are
performing either offset or full-scale calibrations and the
NOXREF bit becomes active, the updating of the respective
calibration registers is inhibited to avoid loading incorrect
coefficients to these registers, and the ERR bit in the status
register is set. If the user is concerned about verifying that a
valid reference is in place every time a calibration is performed,
the status of the ERR bit should be checked at the end of the
calibration cycle.
RESET
The circuitry and serial interface of the AD7794/AD7795 can
be reset by writing 32 consecutive 1s to the device. This resets
the logic, the digital filter, and the analog modulator, and all on-
chip registers are reset to their default values. A reset is
automatically performed on power-up. When a reset is initiated,
the user must allow a period of 500 μs before accessing any of
ADR381
and ADR391, which are
Rev. D | Page 33 of 36
the on-chip registers. A reset is useful if the serial interface
becomes asynchronous due to noise on the SCLK line.
AV
Along with converting external voltages, the ADC can be
used to monitor the voltage on the AV
to Bit CH0 equals 1, the voltage on the AV
attenuated by 6, and the resulting voltage is applied to the
∑-Δ modulator using an internal 1.17 V reference for analog-
to-digital conversion. This is useful because variations in the
power supply voltage can be monitored.
CALIBRATION
The AD7794/AD7795 provide four calibration modes that can
be programmed via the mode bits in the mode register. These
are internal zero-scale calibration, internal full-scale calibration,
system zero-scale calibration, and system full-scale calibration,
which effectively reduce the offset error and full-scale error to
the order of the noise. After each conversion, the ADC
conversion result is scaled using the ADC calibration registers
before being written to the data register. The offset calibration
coefficient is subtracted from the result prior to multiplication
by the full-scale coefficient.
To start a calibration, write the relevant value to the MD2 to
MD0 bits in the mode register. After the calibration is
completed, the contents of the corresponding calibration
registers are updated, the RDY bit in the status register is set,
the DOUT/ RDY pin goes low (if CS is low), and the
AD7794/AD7795 revert to idle mode.
During an internal zero-scale or full-scale calibration, the
respective zero input and full-scale input are automatically
connected internally to the ADC input pins. A system calibration,
however, expects the system zero-scale and system full-scale
voltages to be applied to the ADC pins before initiating the
calibration mode. In this way, external ADC errors are removed.
From an operational point of view, a calibration should be
treated like another ADC conversion. A zero-scale calibration,
if required, should always be performed before a full-scale
calibration. System software should monitor the RDY bit in the
status register or the DOUT/ RDY pin to determine the end of
calibration via a polling sequence or an interrupt-driven routine.
With chop enabled, both an internal offset calibration and
a system offset calibration take two conversion cycles. With
chop enabled, an internal offset calibration is not needed
because the ADC itself removes the offset continuously. With
chop disabled, an internal offset calibration or system offset
calibration takes one conversion cycle to complete. Internal
offset calibrations are required with chop disabled and should
occur before the full-scale calibration.
To perform an internal full-scale calibration, a full-scale input
voltage is automatically connected to the selected analog input
for this calibration. When the gain equals 1, a calibration takes
two conversion cycles to complete when chop is enabled and
DD
MONITOR
DD
AD7794/AD7795
pin. When Bit CH2
DD
pin is internally