AD7746 Analog Devices, AD7746 Datasheet - Page 23

• Manufacturer Part Number: AD7746
• Description: 24-bit, 2 Channel Capacitance to Digital Converter
• Manufacturer: Analog Devices

Specifications of AD7746

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: n/a
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (2Vref) p-p,± 4 pF (Delta C)
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

PARASITIC SERIAL RESISTANCE
The AD7745/AD7746 CDC result is affected by a resistance in
series with the measured capacitance. The total serial resistance,
which refers to R
for the specified performance. See typical performance charac-
teristics shown in Figure 15.
CAPACITIVE GAIN CALIBRATION
The AD7745/AD7746 gain is factory calibrated for the full scale
of ±4.096 pF in the production for each part individually. The
factory gain coefficient is stored in a one-time programmable
(OTP) memory and is copied to the capacitive gain register at
power-up or after reset.
The gain can be changed by executing a capacitance gain
calibration mode, for which an external full-scale capacitance
needs to be connected to the capacitance input, or by writing a
user value to the capacitive gain register. This change would be
only temporary and the factory gain coefficient would be
reloaded back after power-up or reset. The part is tested and
specified only for use with the default factory calibration
coefficient.
CAPACITIVE SYSTEM OFFSET CALIBRATION
The capacitive offset is dominated by the parasitic offset in the
application, such as the initial capacitance of the sensor, any
parasitic capacitance of tracks on the board, and the capacitance
of any other connections between the sensor and the CDC.
Therefore, the AD7745/AD7746 are not factory calibrated for
capacitive offset. It is the user’s responsibility to calibrate the
system capacitance offset in the application.
Any offset in the capacitance input larger than ±1 pF should
first be removed using the on-chip CAPDACs. The small offset
within ±1 pF can then be removed by using the capacitance
offset calibration register.
One method of adjusting the offset is to connect a zero-scale
capacitance to the input and execute the capacitance offset
calibration mode. The calibration sets the midpoint of the
±4.096 pF range (that is, Output Code 0x800000) to that
zero-scale input.
Another method would be to calculate and write the offset cali-
bration register value, the LSB is value 31.25 aF (4.096 pF/2
C
X
R
R
S1
S2
S1
Figure 39. Parasitic Serial Resistance
EXC
CIN
+ R
S2
on Figure 39, should be less than 1 kΩ
CDC
DATA
17
).
Rev. 0| Page 23 of 28
The offset calibration register is reloaded by the default value at
power-on or after reset. Therefore, if the offset calibration is not
repeated after each system power-up, the calibration coefficient
value should be stored by the host controller and reloaded as
part of the AD7745/AD7746 setup.
On the AD7746, the register is shared by the two capacitive
channels. If the capacitive channels need to be offset calibrated
individually, the host controller software should read the
AD7746 capacitive offset calibration register values after
performing the offset calibration on individual channels and
then reload the values back to the AD7746 before executing a
conversion on a different channel.
INTERNAL TEMPERATURE SENSOR
The temperature sensing method used in the AD7745/AD7746
is to measure a difference in ∆V
operated at two different currents (see Figure 40). The ∆V
change with temperature is linear and can be expressed as
where:
K is Boltzmann’s constant (1.38 × 10
T is the absolute temperature in Kelvin.
q is the charge on the electron (1.6 × 10
N is the ratio of the two currents.
n
The AD7745/AD7746 uses an on-chip transistor to measure the
temperature of the silicon chip inside the package. The Σ-Δ
ADC converts the ∆V
factory calibration coefficients, thus the output code is
proportional to temperature:
The AD7745/AD7746 has a low power consumption resulting
in only a small effect due to the part self-heating (less than
0.5°C at V
f
is the ideality factor of the thermal diode.
Temperatur
∆
V
BE
DD
=
I
= 5 V).
(
n
f
Figure 40. Internal Temperature Sensor
∆V
)
INTERNAL TEMPERATURE SENSOR
e
KT
( )
BE
°
q
N × I
C
×
BE
=
MODULATOR
ln(
GENERATOR
to digital, the data are scaled using
REFERENCE
24-BIT Σ-∆
Code
2048
VOLTAGE
CLOCK
N
)
−
BE
4096
voltage of a transistor
V
–23
DD
SCALING
DIGITAL
FILTER
).
AND
–19
AD7745/AD7746
coulombs).
DATA
BE