AD7998 Analog Devices, AD7998 Datasheet
AD7998
Specifications of AD7998
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AD7998 Summary of contents
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... AD7994 for 2-channel and 4-channel equivalent devices, respectively GENERAL DESCRIPTION The AD7997/AD7998 are 8-channel, 10- and 12-bit, low power, successive approximation ADCs with an I interface. The parts operate from a single 2 5.5 V power supply and feature a 2 µs conversion time. The parts contain an 8-channel multiplexer and track-and-hold amplifier that can handle input frequencies MHz ...
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... Writing Two Bytes of Data to a Limit, Hysteresis, or Configuration Register .............................................................. 24 Reading Data from the AD7997/AD7998................................... 26 ALERT/BUSY Pin .......................................................................... 27 SMBus ALERT ............................................................................ 27 BUSY ............................................................................................ 27 Placing the AD7997-1/AD7998-1 into High Speed Mode ... 27 The Address Select (AS) Pin ..................................................... 27 Modes of Operation ....................................................................... 28 Mode 1—Using the CONVST Pin ........................................... 28 Mode 2 – COMMAND MODE ............................................... 29 Mode 3—Automatic Cycle Interval Mode.............................. 30 Outline Dimensions ...
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... DD 0 max DD ±1 µA max 10 pF max 0 min DD Rev Page AD7997/AD7998 = 2.5 V; For the AD7997-0, all 3.4 MHz, unless otherwise noted; SCL Test Conditions/Comments kHz sine wave for f from 1.7 MHz to IN SCL 3.4 MHz kHz sine wave for 400 kHz ...
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... AD7997/AD7998 Parameter LOGIC INPUTS (CONVST) Input High Voltage, V INH Input Low Voltage, V INL Input Leakage Current Input Capacitance LOGIC OUTPUTS (OPEN-DRAIN) Output Low Voltage Floating-State Leakage Current 3 Floating-State Output Capacitance Output Coding CONVERSION RATE Conversion Time Throughput Rate ...
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... AD7998 SPECIFICATIONS Temperature range for B version is −40°C to +85°C. Unless otherwise noted, V specifications apply for 400 kHz; for the AD7998-1, all specifications apply for f SCL MIN MAX Table 2. Parameter 1 DYNAMIC PERFORMANCE 2 Signal-to-Noise + Distortion (SINAD) 2 Signal to Noise Ratio (SNR) ...
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... AD7997/AD7998 Parameter LOGIC INPUTS (CONVST) Input High Voltage, V INH Input Low Voltage, V INL Input Leakage Current Input Capacitance LOGIC OUTPUTS (OPEN-DRAIN) Output Low Voltage Floating-State Leakage Current 3 Floating-State Output Capacitance Output Coding CONVERSION RATE Conversion Time Throughput Rate ...
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... Guaranteed by initial characterization. All values measured with input filtering enabled measured between 0.3 VDD and 0.7 VDD. f High speed mode timing specifications apply to the AD7997-1/AD7998-1 only. Standard and fast mode timing specifications apply to both the AD7997-0/AD7998-0 and the AD7997-1/AD7998-1. See Figure 2. Unless otherwise noted ...
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... A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge. 2 For 3 V supplies, the maximum hold time with SCL SDA START CONDITION P = STOP CONDITION AD7997/AD7998 Limit MIN MAX Max Unit 300 ns 300 160 ns 1000 ns 300 ns ...
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... Exposure to absolute DD −0 maximum rating conditions for extended periods may affect −0 0.3 V device reliability ±10 mA −40°C to +85°C −65°C to +150° 150°C 143°C/W 45°C/W 240 (+0/-5)°C 260 (+0)°C 1.5 kV Rev Page AD7997/AD7998 ...
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... AD7997-1 AGND AD7997 AD7997-x Float AD7998-0 AGND AD7998-0 V AD7998-1 AGND AD7998 Float AD7998 the AS pin is left floating on any of the AD7997/AD7998 parts, the device address is 010 0000. AGND AGND SCL 2 19 AD7997/ DD AGND SDA 3 18 AD7998 ALERT/BUSY AGND 4 ...
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... The AD7997/AD7998 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second-order terms are usually dis- ...
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... AD7997/AD7998 TYPICAL PERFORMANCE CHARACTERISTICS 0 –20 –40 –60 –80 –100 –120 FREQUENCY (kHz) Figure 4. AD7998 Dynamic Performance with 5 V Supply and 2.5 V Reference, 121 kSPS, Mode 1 –10 –30 –50 –70 –90 –110 INPUT FREQUENCY (kHz) Figure 5. AD7997 Dynamic Performance with 5 V Supply and 2 ...
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... V, Mode 1, 3.4 MHz f DD 1.0 0.8 0.6 0.4 POSITIVE INL 0.2 0 –0.2 NEGATIVE INL –0.4 -0.6 –0.8 –1.0 1.2 1.7 2.2 2.7 3.2 3.7 REFERENCE VOLTAGE (V) Figure 12. AD7998 Change in INL vs. Reference Voltage V Mode 1, 121 kSPS 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 -0.6 –0.8 –1.0 3500 4000 1.2 , 121 kSPS Figure 13. AD7998 Change in DNL vs. Reference Voltage V SCL 0.0007 0.0006 0.0005 0.0004 ...
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... TEMPERATURE = –40°C 1.6 TEMPERATURE = +85°C TEMPERATURE = +25°C MODE 2 - 147kSPS 1.4 TEMPERATURE = –40°C 1.2 1.0 MODE 1 - 121kSPS 0.8 0.6 0.4 0.2 0 2.7 3.2 3.7 4.2 SUPPLY VOLTAGE (V) Figure 16. AD7998 Average Supply Current vs. Supply Voltage for Various Temperatures 12.0 11.8 11.6 11.4 11.2 11.0 10.8 10.6 10.4 4.7 5.2 Figure 17. SINAD/ENOB vs. Reference Voltage, Mode 1, 121 kSPS Rev Page ENOB V DD ENOB SINAD V ...
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... I C-compatible serial interface, all housed in a 20-lead TSSOP. This package offers considerable space-saving advantages over alternative solutions. The AD7997/AD7998 require an external reference in the range of 1 The AD7997/AD7998 typically remain in a power-down state while not converting. When supplies are first applied, the parts come power-down state ...
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... AS can also be tied to AGND or left DD floating, allowing the user to select up to five AD7997/AD7998 devices on the same serial bus. An external reference must be applied to the AD7997/AD7998. This reference can be in the range of 1 precision reference like the REF 19x DD family, AD780, ADR03, or ADR381 can be used to supply the reference voltage to the ADC ...
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... INPUT FREQUENCY (kHz) Figure 23. THD vs. Analog Input Frequency for Various Supply Voltages, F –40 –50 –60 –70 –80 –90 –100 10 INPUT FREQUENCY (kHz) Figure 24. THD vs. Analog Input Frequency for Various Source Impedances for V Rev Page AD7997/AD7998 ...
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... LSBs are used as pointer bits to store an address that points to one of the AD7997/AD7998’s data registers. The 4 MSBs are used as command bits when operating in Mode 2 (see the Modes of Operation section). The first byte following each write address is to the address pointer register, containing the address of one of the data registers ...
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... CONFIGURATION REGISTER The configuration register is a 16-bit read/write register that is used to set the operating mode of the AD7997/AD7998. The 4 MSBs of the register are unused. The bit functions of all 12 LSBs of the configuration register are outlined in Table 9. A 2-byte write is necessary when writing to the configuration register. ...
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... CH1 to CH4. Each pair of limit registers has one associated hysteresis register. All 12 registers are 16 bits wide; only the 12 LSBs of the registers are used for the AD7997 and AD7998. For the AD7997, the 2 LSBs, D1 and D0 in these registers, should contain 0s. On power-up, the contents of the DATA ...
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... Table 8. On power-up, the hysteresis registers contain a value of 2 for the AD7997 and a value of 8 for the AD7998 different hysteresis value is required, that value must be written to the hysteresis register for the channel in question. For the AD7997, D1 and D0 of the hysteresis register should contain 0s ...
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... The cycle timer register is an 8-bit, read/write register that stores the conversion interval value for the automatic cycle interval mode of the AD7997/AD7998 (see the Modes of Operation section the cycle timer register are unused and should contain 0s at all times. On power-up, the cycle timer register contains all 0s, thus disabling automatic cycle operation of the AD7997/AD7998 ...
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... Table 6). By giving DD different addresses for the two versions five AD7997/ AD7998 devices can be connected to a single serial bus, or the addresses can be set to avoid conflicts with other devices on the bus. (See Table 6.) The serial bus protocol operates as follows. ...
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... See Figure 28. If the master is write addressing the AD7997/AD7998, it can write to more than one register without readdressing the ADC. After the first write operation has completed for the first data ...
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... R/W ACK. BY AD7997/AD7998 FRAME 1 ADDRESS POINTER REGISTER 9 1 D11 0 D10 ACK. BY AD7997/AD7998 LEAST SIGNIFICANT DATA BYTE Figure 28. 2-Byte Write Sequence Rev Page AD7997/AD7998 ACK. BY AD7997/AD7998 FRAME D1/0 D0/0 ACK. BY STOP BY AD7997/AD7998 MASTER ...
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... When reading data back from a register, for example the conversion result register, if more than two read bytes are supplied, the same or new data is read from the AD7997/ AD7998 without the need to readdress the device. This allows the master to continuously read from a data register without having to readdress the AD7997/AD7998. ...
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... All devices continue to operate in high speed mode until such a time as the master issues a stop condition. When the stop condi- tion is issued, the devices all return to fast mode. THE ADDRESS SELECT (AS) PIN The address select pin on the AD7997/AD7998 is used to set 2 the arbitration during be tied made as close as possible to the AS pin ...
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... The cycle timer register and Bits the address pointer register should contain all 0s when operating the AD7997/ AD7998 in this mode. The CONVST pin should be tied low for all other modes of operation. To select an analog input channel for conversion in this mode, the user must write to the configuration register and select the corresponding channel for conversion ...
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... MHz SCL, the conversion may not be complete before the master tries to read the conversion result. If this is the case, the AD7997-1/AD7998-1 holds the SCL line low during the ACK clock after the read address, until the con- version is complete. When the conversion is complete, the AD7997-1/AD7998-1 releases the SCL line and the master can then read the conversion result ...
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... An automatic conversion cycle can be selected and enabled by writing a value to the cycle timer register. A conversion cycle interval can be set up on the AD7997/AD7998 by programming the relevant bits in the 8-bit cycle timer register, as decoded in Table 24. Only the 3 LSBs are used to select the cycle interval; ...
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... LSB ±0.5 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB 2 C interface modes. The AD7997-1/AD7998-1 support standard, fast, and high speed I Number of Input Channels Rev Page AD7997/AD7998 0.75 8° 0.60 0° ...
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... AD7997/AD7998 NOTES 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...