AD7652 Analog Devices, AD7652 Datasheet
AD7652
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AD7652 Summary of contents
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... Internal Reference. The AD7652 has an internal reference with a typical temperature drift of 7 ppm/°C. 3. Single-Supply Operation. The AD7652 operates from a single 5 V supply. Its power dissipation decreases with throughput. 4. Serial or Parallel Interface. Versatile parallel or 2-wire serial interface arrangement is compatible with both 3 V and 5 V logic. ...
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... Conversion Control.................................................................... 19 Digital Interface .......................................................................... 20 REVISION HISTORY Revision 0, Initial Version. Parallel Interface ......................................................................... 20 Serial Interface ............................................................................ 20 Master Serial Interface ............................................................... 21 Slave Serial Interface .................................................................. 22 Microprocessor Interfacing....................................................... 24 Application Hints............................................................................ 25 Bipolar and Wider Input Ranges .............................................. 25 Layout .......................................................................................... 25 Evaluating the AD7652’s Performance .................................... 25 Outline Dimensions ....................................................................... 26 Ordering Guide........................................................................... 26 Rev Page ...
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... AVDD – 1.85 110 AD7652 Unit Bits µA µs kSPS 2 LSB Bits LSB LSB LSB ppm/° FSR ppm/°C LSB MHz ns ps rms ...
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... AD7652 Parameter DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS Data Format 5 6 Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD Operating Current AVDD 8 9 AVDD 10 DVDD 10 OVDD 10 Power Dissipation without REF 10 Power Dissipation with REF ...
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... See Table 4 1. pF; otherwise, the load maximum. AD7652 Unit ns µs ns µ µ µ µ ...
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... AD7652 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time Minimum SDOUT Valid Hold Time Minimum ...
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... ABSOLUTE MAXIMUM RATINGS 1 Table 5. AD7652 Stress Ratings TEMP , REF, REFBUFIN, AVDD + 0 INGND, REFGND to AGND AGND – 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages AVDD, DVDD, OVDD –0 AVDD to DVDD, AVDD to OVDD ±7 V DVDD to OVDD –0 Digital Inputs – ...
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... When SER/PAR is HIGH, this input, part of the serial port, is used to invert the SCLK signal active in both master and slave modes AGND 1 PIN 1 AVDD 2 IDENTIFIER NC 3 BYTESWAP 4 OB/2C 5 AD7652 NC 6 TOP VIEW NC 7 (Not to Scale) SER/PAR D2/DIVSCLK0 11 D3/DIVSCLK1 ...
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... Chip Select. When CS and RD are both LOW, the interface parallel or serial output bus is enabled also used to gate the external clock. 33 RESET DI Reset Input. When set to a logic HIGH, this pin resets the AD7652 and the current conversion, if any, is aborted. If not used, this pin could be tied to DGND Power-Down Input ...
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... AD7652 Pin No. Mnemonic Type 1 Description 45 TEMP AO Temperature Sensor Voltage Output. 46 REFBUFIN AI/O Reference Input Voltage. The reference output and the reference buffer input. 47 PDREF DI This pin allows the choice of internal or external voltage references. When LOW, the on-chip reference is turned on. When HIGH, the internal reference is switched off and an external reference must be used ...
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... Aperture delay is a measure of the acquisition performance and is measured from the falling edge of the CNVST input to when the input signal is held for a conversion. Transient Response Transient response is the time required for the AD7652 to achieve its rated accuracy after a full-scale step function is applied to its input. Overvoltage Recovery ...
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... AD7652 TYPICAL PERFORMANCE CHARACTERISTICS –1 –2 –3 –4 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 140000 120000 111974 112112 100000 80000 60000 40000 25889 20000 477 7FFB 7FFC 7FFD 7FFE 7FFF 8000 8001 CODE IN HEX Figure 6. Histogram of 261,120 Conversions of a ...
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... Figure 14. THD and Harmonics vs. Temperature AVDD DVDD PDREF = PDBUF = HIGH 100 1000 10000 100000 SAMPLE RATE (SPS) Figure 15. Operating Current vs. Sample Rate FULL SCALE ZERO ERROR –35 – 105 TEMPERATURE (°C) AD7652 105 125 02965-0-034 OVDD 1000000 02965-0-036 125 02965-0-040 ...
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... AD7652 2.5000 2.4995 2.4990 2.4985 2.4980 2.4975 2.4970 –40 – TEMPERATURE (°C) Figure 17. Typical Reference Output Voltage vs. Temperature –30 –26 –22 –18 –14 –10 –6 –2 2 REFERENCE DRIFT (ppm/°C) Figure 18. Reference Voltage Temperature Coefficient Distribution (100 Units) ...
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... ADC that does not exhibit any pipeline or latency, making it ideal for multiple multiplexed channel applications. The AD7652 can be operated from a single 5 V supply and can be interfaced to either digital logic housed in either a 48-lead LQFP or a 48-lead LFCSP that saves space and allows flexible configurations as either a serial or parallel inter- face ...
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... AD7652 Transfer Functions Using the OB/ 2C digital input, the AD7652 offers two output codings: straight binary and twos complement. The LSB size is V /65536, which is about 38.15 µV. The AD7652’s ideal REF transfer characteristic is shown in Figure 21 1 LSB = V /65536 REF 111...111 111 ...
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... AD7652 can be driven directly. Large source impedances will significantly affect the ac performance, especially total harmonic distortion. Driver Amplifier Choice Although the AD7652 is easy to drive, the driver amplifier needs to meet the following requirements: • The driver amplifier and the AD7652 analog input circuit must be able to settle for a full-scale step of the capacitor array at a 16-bit level (0.0015%). In the amplifier’ ...
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... ANALOG INPUT (UNIPOLAR) Power Supply The AD7652 uses three power supply pins: an analog 5 V supply AVDD, a digital 5 V core supply DVDD, and a digital input/output interface supply OVDD. OVDD allows direct interface with any logic between 2.7 V and DVDD + 0 ...
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... PD, until the conversion is complete. CNVST operates independently of CS and RD . Conversions can be automatically initiated with the AD7652. If CNVST is held LOW when BUSY is LOW, the AD7652 controls the acquisition phase and automatically initiates a new conversion. By keeping CNVST LOW, the AD7652 keeps the conversion process running by itself ...
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... D[15:8] or D[7:0]. SERIAL INTERFACE The AD7652 is configured to use the serial interface when SER/ PAR is held HIGH. The AD7652 outputs 16 bits of data, MSB first, on the SDOUT pin. This data is synchronized with the 16 clock pulses provided on the SCLK pin. The output data is valid on both the rising and falling edges of the data clock ...
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... The AD7652 is configured to generate and provide the serial data clock SCLK when the EXT/ INT pin is held LOW. The AD7652 also generates a SYNC signal to indicate to the host when the serial data is valid. The serial clock SCLK and the SYNC signal can be inverted if desired. Depending on the RDC/SDIN input, the data can be read after each conversion or during the following conversion ...
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... Figure 35. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert) While the AD7652 is performing a bit decision important that voltage transients be avoided on digital input/output pins or degradation of the conversion result could occur. This is particularly important during the second half of the conversion ...
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... Another advantage is the ability to read the data at any speed MHz, which accommodates both the slow digital host interface and the fastest serial reading. Finally, in this mode only, the AD7652 provides a daisy-chain feature using the RDC/SDIN pin for cascading multiple converters together. This feature is useful for reducing component count and wiring connections when desired, as, for instance, in isolated multiconverter applications ...
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... AD7652 and the SPI equipped ADSP-219x. To accommodate the slower speed of the DSP, the AD7652 acts as a slave device and data must be read after conversion. This mode also allows the daisy- chain feature. The convert command can be initiated in response to an internal timer interrupt ...
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... ADC to further reduce low frequency ripple. INGND The DVDD supply of the AD7652 can be a separate supply or REF can come from the analog supply AVDD or the digital interface supply OVDD. When the system digital supply is noisy or when ...
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... Temperature Range AD7652AST –40°C to +85°C AD7652ASTRL –40°C to +85°C AD7652ACP –40°C to +85°C AD7652ACPRL –40°C to +85°C 1 EVAL-AD7652CB 2 EVAL-CONTROL BRD2 1 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes. ...
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... NOTES Rev Page AD7652 ...
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... AD7652 NOTES © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02965–0–9/03(0) Rev Page ...