AD7927 Analog Devices, AD7927 Datasheet

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AD7927

Manufacturer Part Number
AD7927
Description
8-Channel, 200 kSPS, 12-Bit ADC with Sequencer in 20-Lead TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD7927

Resolution (bits)
12bit
# Chan
8
Sample Rate
200kSPS
Interface
Ser,SPI
Analog Input Type
SE-Uni
Ain Range
Uni (Vref),Uni (Vref) x 2
Adc Architecture
SAR
Pkg Type
SOP

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Data Sheet
FEATURES
Fast throughput rate: 200 kSPS
Specified for AV
Low power
8 (single-ended) inputs with sequencer
Wide input bandwidth
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface SPI-, QSPI™-, MICROWIRE™-,
Shutdown mode: 0.5 μA maximum
20-lead TSSOP
Qualified for automotive applications
GENERAL DESCRIPTION
The AD7927 is a 12-bit, high speed, low power, 8-channel,
successive approximation ADC. The part operates from a
single 2.7 V to 5.25 V power supply and features throughput
rates up to 200 kSPS. The part contains a low noise, wide
bandwidth track-and-hold amplifier that can handle input
frequencies in excess of 8 MHz.
The conversion process and data acquisition are controlled using
CS and the serial clock signal, allowing the device to easily interface
with microprocessors or DSPs. The input signal is sampled on the
falling edge of CS and the conversion is also initiated at this
point. There are no pipeline delays associated with the part.
The AD7927 uses advanced design techniques to achieve
very low power dissipation at maximum throughput rates. At
maximum throughput rates, the AD7927 consumes 1.2 mA
maximum with 3 V supplies; with 5 V supplies, the current
consumption is 1.5 mA maximum.
Through the configuration of the control register, the analog
input range for the part can be selected as 0 V to REF
to 2 × REF
output coding. The AD7927 features eight single-ended analog
inputs with a channel sequencer to allow a preprogrammed
selection of channels to be converted sequentially.
The conversion time for the AD7927 is determined by the
SCLK frequency, as this is also used as the master clock to
control the conversion. The conversion time may be as short
as 800 ns with a 20 MHz SCLK.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
DSP-compatible
3.6 mW maximum at 200 kSPS with 3 V supply
7.5 mW maximum at 200 kSPS with 5 V supply
70 dB minimum SINAD at 50 kHz input frequency
IN
, with either straight binary or twos complement
DD
of 2.7 V to 5.25 V
IN
or 0 V
with Sequencer in 20-Lead TSSOP
8-Channel, 200 kSPS, 12-Bit ADC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
REF
High Throughput with Low Power Consumption.
The AD7927 offers up to 200 kSPS throughput rates. At the
maximum throughput rate with 3 V supplies, the AD7927
dissipates 3.6 mW of power maximum.
Eight Single-Ended Inputs with a Channel Sequencer.
A consecutive sequence of channels can be selected on
which the ADC cycles and converts.
Single-Supply Operation with V
The AD7927 operates from a single 2.7 V to 5.25 V supply.
The V
directly to either 3 V or 5 V processor systems independent
of AV
Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock,
allowing the conversion time to be reduced through the
serial clock speed increase. The part also features various
shutdown modes to maximize power efficiency at lower
throughput rates. Current consumption is 0.5 μA maxi-
mum when in full shutdown.
No Pipeline Delay.
The part features a standard successive approximation ADC
with a CS input pin, which allows for accurate control of
each sampling instant.
V
V
IN
IN
IN
0
7
DD
DRIVE
FUNCTIONAL BLOCK DIAGRAM
.
INPUT
MUX
AD7927
function allows the serial interface to connect
SEQUENCER
©2003–2011 Analog Devices, Inc. All rights reserved.
AV
T/H
DD
AGND
Figure 1.
CONTROL LOGIC
APPROXIMATION
SUCCESSIVE
12-BIT
DRIVE
ADC
Function.
AD7927
www.analog.com
SCLK
DOUT
DIN
CS
V
DRIVE

Related parts for AD7927

AD7927 Summary of contents

Page 1

... Eight Single-Ended Inputs with a Channel Sequencer. A consecutive sequence of channels can be selected on which the ADC cycles and converts. 3. Single-Supply Operation with V The AD7927 operates from a single 2 5.25 V supply. The V function allows the serial interface to connect DRIVE directly to either processor systems independent of AV ...

Page 2

... AD7927 to TMS320C541 .......................................................... 24   AD7927 to ADSP-21xx .............................................................. 24   AD7927 to DSP563xx ................................................................ 25   Application Hints ........................................................................... 26   Grounding and Layout .............................................................. 26   Evaluating the AD7927 Performance ...................................... 26   Outline Dimensions ....................................................................... 27   Ordering Guide .......................................................................... 27   Automotive Products ................................................................. 27   1/07—Rev Rev. A Updated Format .................................................................. Universal Updated Layout ................................................................................. 8 Updated Layout .............................................................................. 10 Changes to Figure 12 Caption ...

Page 3

... Typically ±0.5 LSB −REF to +REF biased about REF Twos complement output coding Typically ±0.8 LSB RANGE bit set to 1 RANGE bit set 4. 5. DRIVE f = 200 kSPS SAMPLE ±1% specified performance Typically 10 nA DRIVE AD7927 with ...

Page 4

... AD7927 Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating-State Leakage Current 3 Floating-State Output Capacitance Output Coding Straight (Natural) Binary Twos Complement CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS DRIVE During Conversion ...

Page 5

... Power-up time from full power-down/auto shutdown mode 200µ OUTPUT PIN C L 50pF 200µ Figure 2. Load Circuit for Digital Output Timing Specifications Rev Page and timed from a voltage level of 1 DRIVE timing characteristics, is the true bus relinquish time 8 1.6V AD7927 ...

Page 6

... AD7927 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter AV to AGND AGND DRIVE Analog Input Voltage to AGND Digital Input Voltage to AGND Digital Output Voltage to AGND REF to AGND IN Input Current to Any Pin Except Supplies 1 Operating Temperature Range Commercial (B Version) ...

Page 7

... Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD7927 conversion process. 2 DIN Data In. Logic input. Data to be written to the AD7927 control register is provided on this input and is clocked into the register on the falling edge of SCLK (see the Control Register section Chip Select ...

Page 8

... The figure given is the worst case across all eight channels for the AD7927. Power Supply Rejection (PSR) Variations in power supply affect the full-scale transition, − ...

Page 9

... SCLK of 20 MHz. Total Harmonic Distortion (THD) THD is the ratio of the rms sum of harmonics to the fundamental. For the AD7927 defined as THD ...

Page 10

... AD7927 TYPICAL PERFORMANCE CHARACTERISTICS –10 –30 –50 –70 –90 –110 FREQUENCY (kHz) Figure 4. Dynamic Performance at 200 kSPS 200kSPS SAMPLE T = 25°C A RANGE = 0 TO REF INPUT FREQUENCY (kHz) Figure 5. SINAD vs. Analog Input Frequency for Various Supply Voltages ...

Page 11

... CODE Figure 9. Typical INL 1.0 0.8 0.6 0.4 0.2 0 –0.2 = 10Ω –0.4 –0.6 –0.8 100 –1.0 3072 3584 4096 Rev Page DRIVE T = 25° 512 1024 1536 2048 2560 3072 CODE Figure 10. Typical DNL AD7927 3584 4096 ...

Page 12

... CONTROL REGISTER The control register on the AD7927 is a 12-bit, write-only register. Data is loaded from the DIN pin of the AD7927 on the falling edge of SCLK. The data is transferred on the DIN line at the same time that the conversion result is read from the part. The data transferred on the DIN line corresponds to the AD7927 configuration for the next conversion ...

Page 13

... ADD0 through ADD2, in each prior write operation. This mode of operation reflects the traditional operation of a multichannel ADC, without the sequencer function being used, where each write to the AD7927 selects the next channel for conversion (see Figure 11). ...

Page 14

... IN --------------------------------SEQUENCE ONE-------------------------------- The shadow register on the AD7927 is a 16-bit, write-only register. Data is loaded from the DIN pin of the AD7927 on the falling edge of SCLK. The data is transferred on the DIN line at the same time that a conversion result is read from the part. This requires 16 serial clock falling edges for the data transfer. The ...

Page 15

... The AD7927 is a high speed, 8-channel, 12-bit, single-supply ADC. The part can be operated from a 2 5.25 V supply. When operated from either supply, the AD7927 is capable of throughput rates of 200 kSPS. The conversion time may be as short as 800 ns when provided with a 20 MHz clock. ...

Page 16

... LSB values (that is, 1 LSB, 2 LSBs, and so forth). The LSB size is REF /4096 for the AD7927. The ideal transfer IN characteristic for the AD7927 when straight binary coding is selected is shown in Figure 17, and the ideal transfer characteristic for the AD7927 when twos complement coding is selected is shown in Figure 18 30pF R1 Figure 18 ...

Page 17

... IN led 2.5 V supply from a reference source, the AD780, to provide an analog input range 2.5 V (if the RANGE bit (if the RANGE bit is 0). Although the AD7927 is connected the serial interface is connected microprocessor. The V ...

Page 18

... V to easily interface to both 3 V and 5 V processors. For example, if the AD7927 were operated with an AV could be powered from supply. The AD7927 has a larger dynamic range with while still being able to DD interface processors ...

Page 19

... The mode of operation of the AD7927 is con- trolled by the power management bits, PM1 and PM0, in the control register, as detailed in Table 8. When power supplies are first applied to the AD7927, care should be taken to ensure that the part is placed in the required mode of operation (see the Powering Up the AD7927 section). ...

Page 20

... When running the AD7927 with a 20 MHz clock, one dummy 16 SCLK transfer should be sufficient to ensure the part is fully powered up. During this dummy transfer, the contents of the control register should remain unchanged ...

Page 21

... INVALID DATA DIN KEEP DIN LINE TIED HIGH FOR FIRST TWO DUMMY CONVERSIONS Figure 24. Three-Dummy-Conversions to Place AD7927 into the Required Operating Mode After Power Supplies Are Applied POWERING UP THE AD7927 When supplies are first applied to the AD7927, the ADC may power up in any of the operating modes of the part. To ensure ...

Page 22

... Figure 26. Sixteen serial clock cycles are required to perform the conversion process and to access data from the AD7927. For the AD7927, the 12 bits of data are preceded by a leading zero and the three-channel address bits (ADD2 to ADD0) identifying which channel the result corresponds to ...

Page 23

... Figure 27. Writing to Shadow Register Timing Diagram t 5µs MINIMUM CYCLE VALID DATA POWER-UP Figure 28. General Timing Diagram Rev Page DB2 DB1 DB0 THREE-STATE SEQUENCE 2 t MINIMUM QUIET VALID DATA AD7927 ...

Page 24

... It should be noted that for signal processing applications imperative that the frame synchronization signal from the TMS320C541 provides equidistant sampling. The V of the AD7927 takes the same supply voltage as that of the TMS320C541. This allows the ADC to operate at a higher voltage than the serial interface, that is, TMS320C541, if necessary ...

Page 25

... If the number of SCLKs between interrupts is a whole integer figure of N, then equidistant sampling is implemented by the DSP. AD7927 TO DSP563xx The connection diagram in Figure 31 shows how the AD7927 can be connected to the enhanced synchronous serial interface (ESSI) of the DSP563xx family of DSPs from Motorola. Each ...

Page 26

... All three AGND pins of the AD7927 should be sunk in the AGND plane. Digital and analog ground planes should be joined at only one place. If the AD7927 system where multiple devices require an AGND to DGND connec- tion, the connection should still be made at one point only, a star ground point that should be established as close as possible to the AD7927 ...

Page 27

... The EVAL-CONTROL BRD2 board is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending in the CB designators order a complete evaluation kit, please order the particular ADC evaluation board, for example, EVAL-AD7927CB, the EVAL-CONTROL BRD2, and transformer. See the relevant evaluation board application note or data sheet for more information. ...

Page 28

... AD7927 NOTES ©2003–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03088-0-12/11(C) Rev Page Data Sheet ...

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