AD7783 Analog Devices, AD7783 Datasheet

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AD7783

Manufacturer Part Number
AD7783
Description
Single-Channel, Read-Only, Pin-Configured, 24-bit Sigma-Delta A/D Converter with Switchable Current Sources
Manufacturer
Analog Devices
Datasheet

Specifications of AD7783

Resolution (bits)
24bit
# Chan
1
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Bip
Ain Range
0.32 V p-p,5.12 V p-p
Adc Architecture
Sigma-Delta
Pkg Type
SOP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7783BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
REV. C
GENERAL DESCRIPTION
The AD7783 is a complete analog front end for low frequency
measurement applications. The 24-bit sigma-delta ADC con-
tains one fully differential input channel that can be configured
with a gain of 1 or 16 allowing full-scale input signal ranges of
± 2.56 V or ± 160 mV from a +2.5 V differential reference input.
It also contains two 200 mA integrated current sources.
The AD7783 has an extremely simple, read-only digital inter-
face that can be operated in master mode or slave mode.
There are no on-chip registers to be programmed. The input
signal range and current source selection are configured using
two external pins.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FEATURES
Single-Channel, 24-Bit - ADC
Pin Configurable (No Programmable Registers)
Fixed 19.79 Hz Update Rate
Simultaneous 50 Hz and 60 Hz Rejection
24-Bit No Missing Codes
18.5-Bit p-p Resolution (±2.56 V Range)
16.5-Bit p-p Resolution (±160 mV Range)
INTERFACE
Master or Slave Mode of Operation
Slave Mode
POWER
Specified for Single 3 V and 5 V Operation
Normal: 1.3 mA @ 3 V
Power-Down: 9 A
ON-CHIP FUNCTIONS
Rail-to-Rail Input Buffer and PGA
APPLICATIONS
Sensor Measurement
Industrial Process Control
Temperature Measurement
Pressure Measurement
Weigh Scales
Portable Instrumentation
ISOURCE Select ™
Pin Programmable Input Ranges (±2.56 V or ±160 mV)
3-Wire Serial
SPI
Schmitt Trigger on SCLK
®
, QSPI™, MICROWIRE™, and DSP-Compatible
Read-Only, Pin Configured 24-Bit - ADC
The device operates from a 32.768 kHz crystal with an on-chip
PLL generating the required internal operating frequency. The
output data rate from the part is fixed via the master clock at
19.79 Hz and provides simultaneous 50 Hz and 60 Hz rejection
at this update rate. At this update rate, 18-bit p-p resolution can
be obtained.
The part operates from a single 3 V or 5 V supply. When oper-
ating from 3 V supplies, the power dissipation for the part is
3.9 mW. The AD7783 is available in a 16-lead TSSOP.
Another part in the AD778x family is the AD7782. It is similar
to the AD7783 except it has no integrated current sources and
two differential input channels.
with Excitation Current Sources
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax:
AIN(+)
IOUT1
IOUT2
AIN(–)
IPIN
781/461-3113
REFERENCE
SOURCES
MUX
CURRENT
V
ANALOG
AD7783
DD
FUNCTIONAL BLOCK DIAGRAM
INPUT
INPUT
BASIC CONNECTION DIAGRAM
200 A
IEXC1
BUF
©
GND
V
DD
AIN(+)
AIN(–)
IOUT1
IOUT2
REFIN(+)
REFIN(–)
2011
RANGE
POWER SUPPLY
PGA
IEXC2
200 A
AD7783
Analog Devices, Inc. All rights reserved.
GND
V
REFIN(+)
DD
DOUT/RDY
24-BIT -
ADC
XTAL1
XTAL2
SCLK
REFIN(–)
CS
OSCILLATOR
XTAL1 XTAL2
INTERFACE
AD7783
CONTROL
32.768kHz
CRYSTAL
SERIAL
DIGITAL
INTERFACE
LOGIC
AND
AND
PLL
www.analog.com
DOUT/RDY
SCLK
MODE
CS

Related parts for AD7783

AD7783 Summary of contents

Page 1

... V supplies, the power dissipation for the part is 3.9 mW. The AD7783 is available in a 16-lead TSSOP. Another part in the AD778x family is the AD7782 similar to the AD7783 except it has no integrated current sources and two differential input channels. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. ...

Page 2

... Initial Current Matching at 25∞C Drift Matching Line Regulation Load Regulation Output Compliance 5.25 V, REFIN(+) = 2.5 V; REFIN(–) = GND unless otherwise noted.) MIN MAX AD7783B Unit 19.79 Hz nom 24 Bits min 16 Bits p-p 18 Bits p-p See Table I ± 10 ppm of FSR max ± typ ± ...

Page 3

... V min 0.4 V max ± max ± typ Offset Binary 300 ms typ 2.7/3.6 V min/V max 4.75/5.25 V min/V max 1.5 mA max 1.7 mA max mA max 9 mA max 24 –3– AD7783 Test Conditions ...

Page 4

... AD7783 TIMING CHARACTERISTICS Input Logic Logic unless otherwise noted.) DD Limit at T Parameter (B Version) t 30.5176 1 t 50.54 ADC ¥ ADC Slave Mode Timing t 100 5 t 100 6 Master Mode Timing ...

Page 5

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7783 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 6

... SCLK is Schmitt triggered (slave mode), making the interface suitable for opto- isolated applications. CS Chip Select Input active low logic input used to select the AD7783. When CS is low, the PLL 11 establishes lock and allows the AD7783 to initiate a conversion. When CS is high, the conversion is aborted, DOUT and SCLK are three-stated, the AD7783 enters standby mode, and any conversion result in the output shift register is lost ...

Page 7

... The output rate of the AD7783 (f while the settling time equals Normal-mode rejection is the major function of the digital filter on the AD7783. Simultaneous 50 Hz and 60 Hz rejection of better than achieved as notches are placed at both 50 Hz and 60 Hz. Figure 4 shows the filter rejection. ...

Page 8

... CS is used to select the device and to place the device in standby mode. When CS is taken low, the AD7783 is powered up, the PLL locks, and the device initiates a conversion. The device will continue to convert until CS is taken high. When CS is taken high, the AD7783 is placed in standby mode, minimizing the current consumption ...

Page 9

... As a result, the AD7783 is more immune to noise interference than a conventional high resolution converter. However, because the resolution of the AD7783 is so high, and the noise levels from the AD7783 are so that is directed to low, care must be taken with regard to grounding and layout. ...

Page 10

... AD7783BRU −40°C to +85°C AD7783BRU-REEL −40°C to +85°C AD7783BRU-REEL7 −40°C to +85°C AD7783BRUZ −40°C to +85°C AD7783BRUZ-REEL7 −40°C to +85°C EVAL-AD7783EBZ −40°C to +85° RoHS Compliant Part. REVISION HISTORY 10/11—Rev Rev. C Changes to Figure 2 ........................................................................... 5 Changes to Ordering Guide ........................................................... 10 8/04— ...

Page 11

... NOTES Rev Page AD7783 ...

Page 12

... AD7783 NOTES ©2002–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02702-0-10/11(C) Rev Page ...

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