AD7719 Analog Devices, AD7719 Datasheet
AD7719
Specifications of AD7719
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AD7719 Summary of contents
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... Weigh Scales Portable Instrumentation Transmitters GENERAL DESCRIPTION The AD7719 is a complete analog front end for low frequency measurement applications. It contains two high resolution Σ-∆ ADCs, switchable matched excitation current sources, low-side power switches, digital I/O port, and temperature sensor. The 24-bit main channel with PGA accepts fully differential, unipolar, and bipolar input signal ranges from 1.024 × ...
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... ID Register (ID): (A3, A2, A1 Power-On Reset = 0x0X User Nonprogrammable Test Registers . . . . . . . . . . . . . . 26 CONFIGURING THE AD7719 . . . . . . . . . . . . . . . . . . . . . 27 MICROCOMPUTER/MICROPROCESSOR INTERFACING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 AD7719-to-68HC11 Interface . . . . . . . . . . . . . . . . . . . . . 29 AD7719-to-8051 Interface . . . . . . . . . . . . . . . . . . . . . . . . 29 AD7719-to-ADSP-2103/ADSP-2105 Interface . . . . . . . . 30 CIRCUIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 30 Analog Input Channels . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Programmable Gain Amplifier . . . . . . . . . . . . . . . . . . . . . 32 Bipolar/Unipolar Configuration . . . . . . . . . . . . . . . . . . . . 32 Data Output Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Burnout Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Excitation Currents ...
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... Reference Detect Levels AUXILIARY CHANNEL 2 No Missing Codes Resolution Output Noise and Update Rates Integral Nonlinearity REV ( AD7719B Unit 5.4 Hz min 105 Hz max 24 Bits min 13 Bits p-p 18 Bits p-p See Tables ±10 ppm of FSR max ± ...
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... TEMPERATURE SENSOR Accuracy TRANSDUCER BURNOUT AIN(+) Current AIN(–) Current Initial Tolerance @ 25°C Drift 2, 9 SYSTEM CALIBRATION Full-Scale Calibration Limit Zero-Scale Calibration Limit Input Span AD7719B Unit ±3 µV typ ±10 nV/°C typ ±0.75 LSB typ 0.5 ppm/°C typ ±1 LSB typ ...
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... V min/max 4.75/5.25 V min/max 2.7/3.6 V min/max 4.75/5.25 V min 0.6 mA max 0.75 mA max –5– AD7719 Test Conditions ...
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... V DD sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 AGND and DGND are connected internally within the AD7719. ORDERING GUIDE Temperature Range Package Description –40°C to +85°C SOIC – ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7719 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... Figures 2 and 3 show timing diagrams for interfacing to the AD7719 with CS used to decode the part. Figure 3 is for a read operation from the AD7719’s output shift register while Figure 2 shows a write operation to the input shift register possible to read the same data twice from the output register even though the RDY line returns high after the first read operation ...
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... The serial interface can be reset by exercising the RESET input on the part. It can also be reset by writing a series the DIN input logic 1 is written to the AD7719 DIN line for at least 32 serial clock cycles, the serial interface is reset. This ensures that in 3-wire systems, if the interface gets lost, either via a software error or by some glitch in the system, it can be reset back to a known state ...
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... SCLK, DIN, and DOUT used to interface with the device. A weak pull- the CS input. RDY RDY is a logic low status output from the AD7719. RDY is low if either the main ADC or auxiliary ADC 22 channel has valid data in its data register. This output returns high on completion of a read operation from the data register ...
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... FROM WHILE RECORDING THE DATA FROM THE DEVICES. 800 600 400 200 TEMPERATURE SENSOR ( C) TPC 5. Temperature Sensor Accuracy 800 600 400 200 0 –30 –20 – MAIN CAL ACC TPC 6. Full-Scale Error Distribution AD7719 90 100 110 50 20 ...
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... In this manner, the 1-bit output of the comparator is translated into a band-limited, low noise output from the AD7719 ADC. The AD7719 filter is a low-pass, Sinc or (SIN(x)/x) quantization noise introduced at the modulator. The cutoff frequency and decimated output data rate of the filter are pro- grammable via the SF word loaded to the filter register ...
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... Normal mode rejection is the major function of the digital filter on the AD7719. The normal mode 50 Hz ± rejection with an SF word typically –100 dB. The 60 Hz ± rejec- 3 tion with typically –100 dB. Simultaneous 50 Hz and 60 Hz rejection of better than achieved with ...
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... AD7719 0 –20 –40 –60 –80 –100 –120 –140 –160 –180 –200 50 100 150 200 250 300 350 400 450 500 550 600 0 FREQUENCY (Hz OUTPUT DATA RATE = 105Hz INPUT BANDWIDTH = 25.2Hz FIRST NOTCH = 52.5Hz 50Hz REJECTION = –23.6dB, 50Hz 1Hz REJECTION = –20.5dB 60Hz REJECTION = – ...
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... Input Range 160 Table VII. Peak-to-Peak Resolution vs. Update Rate for Auxiliary ADC (Unbuffered Mode) SF Word 13 69 255 –15– AD7719 320 mV 640 mV 1.28 V 4.50 6.70 0.95 1.40 0.51 0.82 320 mV 640 mV 1.28 V 15.5 16 17.5 18 18.5 18.8 320 mV 640 mV 1.28 V 3.82 5.69 0.82 1.21 0.44 0.71 320 mV 640 mV 1. ...
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... AD7719 ON-CHIP REGISTERS Both the main and auxiliary ADC channels are controlled and con- figured via a number of on-chip registers as shown in Figure 10 and described in more detail in the following pages. In the following descriptions, SET implies a logic 1 state and CLEARED implies a logic 0 state, unless otherwise stated. ...
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... I/O port. This register determines the amount of averaging performed by the sinc filter and consequently deter- mines the data update rate of the AD7719. The filter register determines the update rate for both the main and aux ADCs. ...
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... AD7719 Register Name Type Size Main ADC (DATA0) Data Register Read Only 16 Bits or 24 Bits 0x00 0000 Aux ADC (DATA1) Data Register Read Only 16 Bits Main ADC Offset Register Read/Write 24 Bits Main ADC Gain Register Read/Write 24 Bits Aux ADC Offset Register ...
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... A 0 must be written to this bit position to ensure correct operation of the AD7719. CR3–CR0 A3–A0 Register Address Bits. These address bits are used to select which of the AD7719’s registers is being accessed during this serial interface communication the MSB of the three selection bits. A3 ...
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... AD7719 Status Register (A3, A2, A1 Power-On Reset = 0x00) The ADC Status register is an 8-bit read-only register. To access the ADC Status register, the user must write to the Communica- tions register selecting the next operation read and loading ...
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... OSCPD Oscillator Power-Down Bit. If this bit is set, placing the AD7719 in standby mode will stop the crystal oscillator, reducing the power drawn by the AD7719 to a minimum. The oscillator will require 300 ms to begin oscillating when the ADC is taken out of standby mode. If this bit is cleared, the oscillator is not shut off when the ADC is put into standby mode and will not require the 300 ms start-up time when the ADC is taken out of standby. MR2– ...
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... AD7719 Operating Characteristics when Addressing the Mode and Control Registers 1. Any change to the MD bits will immediately reset both ADCs. A write to the MD2–0 bits with no change is also treated as a reset. (See exception to this in Note 3 AD0CON is written when AD0EN = AD0EN is changed from both ADCs are also immediately reset ...
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... When set by the user, the input range is ±REFIN2. When cleared by the user, the input range is ±REFIN2/2. NOTES 1. When the temperature sensor is selected, the AD7719 automatically selects its internal reference. The temperature sensor is not factory calibrated. Temp sensor is suitable for relative temperature measurements. The temperature sensor yields conversion results where a conversion result of 0x8000 equates to typically 0°C. ...
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... AD7719 Filter Register (A3, A2, A1 Power-On Reset = 0x45) The Filter register is an 8-bit register from which data can be read or to which data can be written. This register determines the amount of averaging performed by the sinc filter. Table XV outlines the bit designations for the Filter register ...
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... IOCON1 P2DAT an input. IOCON0 P1DAT The values written to these data bits appear at the output port when the I/O bits are enabled as outputs. P2 and P1 are outputs only, so reading P2DAT and P1DAT will return what was last written to these bits. REV. A –25– AD7719 ...
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... User Nonprogrammable Test Registers The AD7719 contains two test registers. The bits in this test register control the test modes of the AD7719, which are used for the testing of the device. The user is advised not to change the contents of these registers. ...
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... This allows the user to tailor the number of bits in any transfer to match the register length of the required register in the AD7719. Even though some of the registers on the AD7719 are only eight bits in length, communicating with two of these registers in successive write operations can be handled as a single 16-bit data transfer, if required ...
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... YES WRITE TO THE COMMUNICATIONS REGISTER SETTING UP NEXT OPERATION WRITE TO THE MODE REGISTER WRITE TO MODE REGISTER SELECTING ZERO-SCALE CALIBRATION Figure 11. Flowchart for Initializing, Calibrating, and Reading Data from the AD7719 Main and Aux Channels POLL RDY PIN NO RDY LOW? YES WRITE TO THE COMMUNICATIONS REGISTER ...
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... SCLK line idles high between data transfers. The AD7719 is not capable of full duplex opera- tion. If the AD7719 is configured for a write operation, no data appears on the DOUT lines even when the SCLK input is active. Simi- larly, if the AD7719 is configured for a read operation, data presented to the part on the DIN line is ignored even when SCLK is active ...
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... ADSP-2103/ADSP-2105 are configured as active low outputs and the ADSP-2103/ADSP-2105 serial clock line, SCLK, is also configured as an output. The CS for the AD7719 is active when either the RFS or TFS outputs from the ADSP-2103/ ADSP-2105 are active. The serial clock rate on the ADSP-2103/ ADSP-2105 should be limited to 3 MHz to ensure correct opera- tion with the AD7719 ...
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... AGND + 100 mV and AV the common-mode voltage and input voltage range so that these limits are not exceeded; otherwise there will be a degradation in linearity and noise performance. –31– AD7719 PSEUDO- DIFFERENTIAL MUX1 INPUT AIN1 AIN1/AIN4 ...
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... AIN(+) input AIN(–) is 2.5 V and the AD7719 is configured for an analog input range of ±1.28 V, the analog input range on the AIN(+) input is 1. 3.78 V (i.e., 2.5 V ± 1.28 V). Bipolar or unipolar options are chosen by programming the main and auxiliary U/B bit in the ADC0CON and ADC1CON registers, respectively ...
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... These current sources can be used to excite external resistive bridge or RTD sensors. Crystal Oscillator The AD7719 is intended for use with a 32.768 kHz watch crys tal. A PLL internally locks onto a multiple of this frequency to ...
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... The RESET input on the AD7719 resets all the logic, the digi- tal filter, and the analog modulator while all on-chip registers are reset to their default state. RDY is driven high and the AD7719 ignores all communications to any of its registers while the RESET input is low. When the RESET input returns high, the ...
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... The analog ground plane should be allowed to run under the AD7719 to prevent noise coupling. The power supply lines to the AD7719 should use as wide a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals like clocks ...
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... RL1 and RL4, but these simply shift the common-mode voltage. There is no voltage drop across lead resistances RL2 and RL3 as the input current to the AD7719 is very low, looking into a high input impedance buffer. R voltage to ensure that it lies within the common-mode range (AGND + 100 application shown, the on-chip 200 µ ...
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... A) driven from the controller. During the conversion process, the AD7719 takes two conversion results, one on each phase. During Phase 1, the on-chip current source is directed to IOUT1 and flows top to bottom through the sensor and switch controlled by A ...
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... Not shown in Figure 24 is the isolated power source required to develops enough CM power the front end. The advantages of the AD7719 in these applications is the dual-channel operation, meaning that the user does not have to interrupt the main channel when measur- ing secondary variables, and therefore does not have the latency associated with the settling times of the digital filter ...
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... SEATING 0.32 (0.0126) PLANE BSC 0.33 (0.0130) 0.23 (0.0091) COMPLIANT TO JEDEC STANDARDS MS-013AE (RU-28) Dimensions shown in millimeters 9.80 9.70 9. 4.50 4.40 4.30 6.40 BSC 1 14 0.65 1.20 BSC MAX 0.30 0.20 0.19 SEATING 0.09 PLANE COMPLIANT TO JEDEC STANDARDS MS-153AE –39– AD7719 0.75 (0.0295) 45 0.25 (0.0098 1.27 (0.0500) 0.40 (0.0157) 0. 0.60 0.45 ...
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... AD7719 Revision History Location 4/03—Data Sheet changed from REV REV. A. Updated format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 –40– Page REV. A ...