AD7888 Analog Devices, AD7888 Datasheet

no-image

AD7888

Manufacturer Part Number
AD7888
Description
2.7 V to 5.25 V, Micro Power, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Pin TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD7888

Resolution (bits)
12bit
# Chan
8
Sample Rate
125kSPS
Interface
Ser,SPI
Analog Input Type
SE-Uni
Ain Range
Uni (Vref),Uni 2.5V
Adc Architecture
SAR
Pkg Type
SOIC,SOP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7888AR
Manufacturer:
AD
Quantity:
9
Part Number:
AD7888AR
Manufacturer:
JOHANSON
Quantity:
15 000
Part Number:
AD7888AR
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7888AR.
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7888ARU
Manufacturer:
AD
Quantity:
5
Part Number:
AD7888ARU
Manufacturer:
AD
Quantity:
16
Part Number:
AD7888ARU
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7888ARU-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7888ARUZ
Manufacturer:
ADI
Quantity:
1 000
Part Number:
AD7888ARUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7888ARZ
Quantity:
30 000
REV. C
a
GENERAL DESCRIPTION
The AD7888 is a high speed, low power, 12-bit ADC that oper-
ates from a single 2.7 V to 5.25 V power supply. The AD7888 is
capable of a 125 kSPS throughput rate. The input track-and-
hold acquires a signal in 500 ns and features a single-ended
sampling scheme. The AD7888 contains eight single-ended
analog inputs, AIN1 through AIN8. The analog input on each
of these channels is from 0 to V
verting full power signals up to 2.5 MHz.
The AD7888 features an on-chip 2.5 V reference that can be
used as the reference source for the A/D converter. The REF
IN/REF OUT pin allows the user access to this reference. Alter-
natively, this pin can be overdriven to provide an external refer-
ence voltage for the AD7888. The voltage range for this external
reference is from 1.2 V to V
CMOS construction ensures low power dissipation of typically
2 mW for normal operation and 3 µW in power-down mode.
The part is available in a 16-lead narrow body small outline
(SOIC) and a 16-lead thin shrink small outline (TSSOP) package.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
DD
.
REF
. The part is capable of con-
125 kSPS, 12-Bit ADC in 16-Lead TSSOP
2.7 V to 5.25 V, Micropower, 8-Channel,
PRODUCT HIGHLIGHTS
1. Smallest 12-bit 8-channel ADC; 16-lead TSSOP is the same
2. Lowest Power 12-bit 8-channel ADC.
3. Flexible power management options including automatic
4. Analog input range from 0 V to V
5. Versatile serial I/O port (SPI/QSPI/MICROWIRE/DSP
REF IN/REF OUT
area as an 8-lead SOIC and less than half the height.
power-down after conversion.
Compatible).
AGND
AIN8
AIN1
FUNCTIONAL BLOCK DIAGRAM
MUX
CS
I/P
BUF
REDISTRIBUTION
CONTROL LOGIC
DIN
SAR + ADC
CHARGE
©2010 Analog Devices, Inc. All rights reserved.
SPORT
DAC
T/H
2.5V
REF
DOUT
REF
SCLK
AD7888
(V
COMP
DD
AD7888
).
AGND
V
DD

Related parts for AD7888

AD7888 Summary of contents

Page 1

... GENERAL DESCRIPTION The AD7888 is a high speed, low power, 12-bit ADC that oper- ates from a single 2 5.25 V power supply. The AD7888 is capable of a 125 kSPS throughput rate. The input track-and- hold acquires a signal in 500 ns and features a single-ended sampling scheme. The AD7888 contains eight single-ended analog inputs, AIN1 through AIN8 ...

Page 2

... AD7888–SPECIFICATIONS otherwise noted MHz ( 5.25 V); T SCLK DD Parameter DYNAMIC PERFORMANCE 2, 3 Signal to Noise + Distortion Ratio (SNR Total Harmonic Distortion (THD) 2 Peak Harmonic or Spurious Noise 2 Intermodulation Distortion (IMD) Second Order Terms Third Order Terms 2 Channel-to-Channel Isolation Full Power Bandwidth ...

Page 3

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7888 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 4

... AD7888 1 TIMING SPECIFICATIONS Limit at T (A, B Versions) Parameter 4. 5. SCLK t 14.5 t CONVERT SCLK t 1.5 t ACQ SCLK 0 SCLK t 0 SCLK NOTES 1 Sample tested at 25°C to ensure compliance. All input signals are specified with (10 Mark/Space ratio for the SCLK input is 40/60 to 60/40 ...

Page 5

... MSB first. 16 SCLK Serial Clock. Logic Input. SCLK provides the serial clock for accessing data from the part and writing serial data to the Control Register. This clock input is also used as the clock source for the AD7888’s conversion process. REV. C PIN CONFIGURATIONS ...

Page 6

... The theoretical signal to (noise + distortion) ratio for an ideal N-bit converter with a sine wave input is given by: Signal to (Noise + Distortion) = (6. 1.76) dB Thus for a 12-bit converter, this is 74 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7888 defined as ...

Page 7

... CONTROL REGISTER The Control Register on the AD7888 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7888 on the rising edge of SCLK. The data is transferred on the DIN line at the same time as the conversion result is read from the part. This requires 16 serial clocks for every data transfer ...

Page 8

... The AD7888 is a fast, low power, 12-bit, single supply, 8-channel A/D converter. The part can be operated from 3.6 V) supply or from 5 V (4. 5.25 V) supply. When operated from either supply supply, the AD7888 is capable of throughput rates of 125 kSPS when provided with a 2 MHz clock. ...

Page 9

... On power-up, the default AIN selection is AIN1. When returning to normal operation from power-down, the AIN selected will be the same one that was selected prior to power-down being initi- ated. Table II below shows the multiplexer address correspond- ing to each analog input from AIN1 to AIN8 for the AD7888. ADD2 0 0 ...

Page 10

... SCLK edge after the falling edge of CS. The first falling SCLK edge after the CS falling edge will cause the part to power up again. When the AD7888 is in full shutdown, the only way to fully power it up again is to reprogram the power management bits to PM1 = PM0 = 0, i ...

Page 11

... AD7888 remaining fully powered all the time. Figure 13 shows the general diagram of the operation of the AD7888 in this mode. The data presented to the AD7888 on the DIN line during the first eight clock cycles of the data transfer are loaded to the Control Register. The part will remain powered up at the end of the conversion as long as PM1 and PM0 were set to zero in the write during that conversion ...

Page 12

... Figure 15 shows the general diagram of the operation of the AD7888 in this mode. On the first falling SCLK edge after CS goes low, the AD7888 comes out of standby. The AD7888 wake-up time is very short in this mode possible to wake up the part and carry out a valid conversion in the same read/ write operation ...

Page 13

... DIN line when reading data from the part. Sixteen serial clock cycles are required to perform the conver- sion process and to access data from the AD7888. In applica- tions where the first serial clock edge, following CS going low falling edge, this edge clocks out the first leading zero. Thus, the first rising clock edge on the SCLK clock has the first lead- ing zero provided ...

Page 14

... AD7888 MICROPROCESSOR INTERFACING The serial interface on the AD7888 allows the part to be directly connected to a range of many different microprocessors. This section explains how to interface the AD7888 with some of the more common microcontroller and DSP serial interface protocols. AD7888 to TMS320C5x The serial interface on the TMS320C5x uses a continuous serial clock and frame synchronization signals to synchronize the data transfer operations with peripheral devices like the AD7888 ...

Page 15

... The analog ground plane should be allowed to run under the AD7888 to avoid noise coupling. The power supply lines to the AD7888 should use as large a trace as pos- sible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals like ...

Page 16

... AD7888 OUTLINE DIMENSIONS 4.00 (0.1575) 3.80 (0.1496) 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 4.50 4.40 4.30 PIN 1 0.15 0.05 10.00 (0.3937) 9.80 (0.3858 6.20 (0.2441) 1 5.80 (0.2283) 8 1.27 (0.0500) BSC 1.75 (0.0689) 1.35 (0.0531) SEATING 0.51 (0.0201) PLANE 0 ...

Page 17

... This can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BOARD for evaluation/demonstration purposes. REVISION HISTORY 6/10—Rev Rev. C Changes to Standby Mode Parameter, AD7888 Specifications Section ............................................................................................... 3 Changes to Operating Temperature Range, Commercial (B Version) Parameter, Absolute Maximum Ratings Section ..... 3 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 6/01— ...

Related keywords