AD7730 Analog Devices, AD7730 Datasheet - Page 45
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AD7730
Manufacturer Part Number
AD7730
Description
CMOS, 24-Bit Sigma-Delta, Bridge Transducer ADC for Load Cell Applications
Manufacturer
Analog Devices
Datasheet
1.AD7730L.pdf
(52 pages)
Specifications of AD7730
Resolution (bits)
24bit
# Chan
2
Sample Rate
n/a
Interface
Ser
Analog Input Type
Diff-Bip,Diff-Uni,SE-Uni
Ain Range
Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC,SOP
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AD7730L–SPECIFICATIONS
AV
REV. A
Parameter
STATIC PERFORMANCE (CHP = 1)
STATIC PERFORMANCE (CHP = 0)
ANALOG INPUTS/REFERENCE INPUTS
DD
Power Supply Rejection
Common-Mode Rejection (CMR) on AIN 105
No Missing Codes
Output Noise and Update Rates
Integral Nonlinearity
Offset Error
Offset Drift vs. Temperature
Offset Drift vs. Time
Positive Full-Scale Error
Positive Full-Scale Drift vs Temp
Positive Full-Scale Drift vs Time
Gain Error
Gain Drift vs. Temperature
Gain Drift vs. Time
Bipolar Negative Full-Scale Error
Negative Full-Scale Drift vs. Temp
Power Supply Rejection
Common-Mode Rejection (CMR)
Analog Input DC Bias Current
Analog Input DC Bias Current Drift
Analog Input DC Offset Current
Analog Input DC Offset Current Drift
No Missing Codes
Output Noise and Update Rates
Integral Nonlinearity
Offset Error
Offset Drift vs. Temperature
Offset Drift vs. Time
Positive Full-Scale Error
Positive Full-Scale Drift vs. Temp
Positive Full-Scale Drift vs. Time
Gain Error
Gain Drift vs. Temperature
Gain Drift vs. Time
Bipolar Negative Full-Scale Error
Negative Full-Scale Drift vs. Temp
CMR on REF IN
Analog Input DC Bias Current
Analog Input DC Bias Current Drift
Analog Input DC Offset Current
Analog Input DC Offset Current Drift
Normal-Mode 50 Hz Rejection
Normal-Mode 60 Hz Rejection
Common-Mode 50 Hz Rejection
Common-Mode 60 Hz Rejection
Analog Inputs
Reference Input
; REF IN(–) = AGND = DGND = 0 V; f
Differential Input Voltage Ranges
Absolute/Common-Mode Voltage
REF IN(+) – REF IN(–) Voltage
REF IN(+) – REF IN(–) Voltage
Absolute/Common-Mode Voltage
NO REF Trigger Voltage
2, 8
8
2
2
4
4
4
4
2, 5
5
2, 6, 9
6, 9
2
6
2
2
2
2
4
2
2
2
2, 6, 7
4
2
6, 7
2, 6
11
2
12
13
2
CLK IN
2
= 2.4576 MHz. All specifications T
B Version
24
See Tables XXI & XXII
22
See Note 3
5
25
See Note 3
3
10
See Note 3
3
10
See Note 3
3
120
118
40
100
10
50
24
See Tables XXIII & XXIV
22
See Note 3
0.5
2.5
See Note 3
0.6
3
See Note 3
2
10
See Note 3
0.6
90
100
50
150
25
75
88
88
120
120
0 to +10 or 10
0 to +20 or 20
0 to +40 or 40
0 to +80 or 80
AGND + 1.2 V
AV
+2.5
+5
AGND – 30 mV
AV
0.3
0.65
DD
DD
– 0.95 V
+ 30 mV
1
(AV
DD
= +5 V, DV
–45–
Units
Bits min
ppm of FSR max
nV/ C typ
nV/1000 Hours typ
ppm of FS/ C max
ppm of FS/1000 Hours typ
ppm/ C max
ppm/1000 Hours typ
ppm of FS/ C max
dB typ
dB min
nA max
pA/ C typ
nA max
pA/ C typ
Bits min
ppm of FSR max
ppm/ C typ
ppm/1000 Hours typ
dB typ
dB typ
dB typ
nA max
pA/ C typ
nA max
pA/ C typ
dB min
dB min
dB min
dB min
mV nom
mV nom
mV nom
mV nom
V min
V max
V nom
V nom
V min
V max
V min
V max
V/ C typ
V/1000 Hours typ
V/ C typ
V/1000 Hours typ
V/ C typ
DD
= +3 V or +5 V; REF IN(+) =
MIN
to T
MAX
unless otherwise noted.)
Measured with Zero Differential Voltage
SKIP = 0
Unipolar Offset and Bipolar Zero Errors
Measured with Zero Differential Voltage
From 49 Hz to 51 Hz
From 59 Hz to 61 Hz
From 49 Hz to 51 Hz
From 59 Hz to 61 Hz
HIREF Bit of Mode Register = 0
HIREF Bit of Mode Register = 1
NO REF Bit Active If V
NO REF Bit Inactive If V
Conditions/Comments
Offset Error and Offset Drift Refer to Both
Unipolar Offset and Bipolar Zero Errors
At DC. Measured with Zero Differential Voltage
Offset Error and Offset Drift Refer to Both
At DC. Measured with Zero Differential Voltage
At DC. Measured with Zero Differential Voltage
Assuming 2.5 V or 5 V Reference with
HIREF Bit Set Appropriately
Gain = 250
Gain = 125
Gain = 62.5
Gain = 31.25
10
AD7730/AD7730L
REF
REF
Below This Voltage
Above This Voltage