AD9066 Analog Devices, AD9066 Datasheet
AD9066
Specifications of AD9066
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AD9066 Summary of contents
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... MSPS conversion rates. The digital input (ENCODE) utilizes a CMOS input stage with a TTL compatible (1.4 V) threshold. The AD9066 is housed in a 28-lead SOIC and a 28-lead SSOP package and is available in two temperature grades. The AD9066JR is rated for operation over the 0°C to 70°C commer- cial temperature range. The AD9066AR/ARS is rated for the – ...
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... VI Full 4.75 IV Full 110 VI Full 80 VI Full 400 and V . The ac load on all the digital outputs during test (max 4°C/W, θ = 41°C/W, θ AD9066AR/ARS Max Min Typ Max 525 450 500 530 – 1.1 S +1.0 –1.0 +1 100 ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9066 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... For the AD9066 there are 32 codes above and below the midscale voltage of the A see Figure 3). The full-scale input range of the AD9066 is equal to 500/620 × (VT – VB), or nominally 500 mV. For dc coupled applications, the REF A and REF B voltages can be used to feed back offset compensation signals ...
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... Timing The duty cycle of the encode clock for the AD9066 is critical in obtaining rated performance of the ADC. Rated maximum and minimum pulse widths should be maintained, especially for sample rates greater than 40 MSPS. The AD9066 provides latched data outputs with three pipeline delays. The length and load on the output data lines should be minimized to reduce power supply transients inside the AD9066 which might diminish dynamic performance ...
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... AD607 BIAS CIRCUIT Theory of Operation The AD9066 dual ADC employs a patented interpolated flash architecture. This architecture enables 64 possible quantization levels with only 32 comparator preamplifiers. This keeps input capacitance to a minimum. The midpoint of the reference lad- der is fed back to the analog input, allowing easy biasing of the ADC to midscale for ac coupled applications ...
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... BSC 28-Lead SSOP (RS-28) 0.407 (10.34) 0.397 (10.08 0.07 (1.79) 0.078 (1.98) PIN 1 0.066 (1.67) 0.068 (1.73) 0.0256 0.015 (0.38) 0.008 (0.203) SEATING 0.009 (0.229) (0.65) 0.010 (0.25) PLANE 0.002 (0.050) BSC 0.005 (0.127) 0.4193 (10.65) 0.3937 (10.00) 0.0291 (0.74) 45 0.0098 (0.25 0.0500 (1.27) 0.0157 (0.40) 0.03 (0.762) 8° 0° 0.022 (0.558) AD9066 ...