AD5410 Analog Devices, AD5410 Datasheet
AD5410
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AD5410 Summary of contents
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... Trademarks and registered trademarks are the property of their respective owners. Single-Channel, 12-/16-Bit, Serial Input mA, Current Source DAC GENERAL DESCRIPTION The AD5410/AD5420 are low cost, precision, fully integrated 12-/16-bit converters offering a programmable current source output designed to meet the requirements of industrial process control applications. The output current range is programmable mA mA overrange function ...
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... Figures .............................................................................................. 23 Changes to Thermal and Supply Considerations Section and Table 21 ............................................................................................ 26 Updated Outline Dimensions ....................................................... 28 Changes to Ordering Guide .......................................................... 28 3/09—Revision 0: Initial Version Status Register ............................................................................. 19 AD5410/AD5420 Features ............................................................ 20 Fault Alert .................................................................................... 20 Asynchronous Clear (CLEAR) ................................................. 20 Internal Reference ...................................................................... 20 External Current Setting Resistor ............................................ 20 Digital Power Supply .................................................................. 20 External Boost Function............................................................ 20 Digital Slew Rate Control .......................................................... 21 I Filtering Capacitors ...
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... MIN Unit Test Conditions/Comments Bits AD5420 Bits AD5410 % FSR AD5420 % FSR AD5420 25° FSR AD5410 % FSR AD5410 25° FSR AD5420 % FSR AD5410 LSB Guaranteed monotonic % FSR % FSR T = 25°C A ppm FSR/°C % FSR AD5420 % FSR AD5420 25°C ...
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... DI CC Power Dissipation 1 Temperature range: −40°C to +85°C; typical at +25°C. For and ranges, INL is measured from Code 256 for the AD5420 and Code 16 for the AD5410 Guaranteed by design and characterization but not production tested. 4 The on-chip reference is production trimmed and tested at 25° ...
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... Data setup time ns min Data hold time ns min LATCH low time ns max Serial output delay time (C ) and timed from a voltage level of 1 Rev Page AD5410/AD5420 = 300 Ω; all specifications LOAD MIN = 300 Ω; all specifications LOAD MIN = 50 pF) ...
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... AD5410/AD5420 SCLK LATCH SDIN CLEAR I OUT SCLK LATCH SDIN DB23 INPUT WORD SPECIFIES REGISTER TO BE READ SDO UNDEFINED DATA SCLK 1 LATCH SDIN DB23 INPUT WORD FOR DAC N SDO DB23 DB23 ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability ESD CAUTION + 0 )/θ with on-chip DD Rev Page AD5410/AD5420 ...
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... Internal Reference Voltage Output. V drift is 1.8 ppm/°C. External Reference Voltage Input. V This pin, when connected to GND, disables the internal supply, and an external supply CC must be connected to the DV supply. See the AD5410/AD5420 Features section. Do not connect to these pins. Rev Page PIN 1 ...
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... Optional External Transistor Connection. Connecting an external transistor reduces the power dissipated in the AD5410/AD5420. See the AD5410/AD5420 Features section. Connection for Optional Output Filtering Capacitor. See the AD5410/AD5420 Features section. Connection for Optional Output Filtering Capacitor. See the AD5410/AD5420 Features section. Positive Analog Supply Pin. Voltage ranges from 10 Ground Reference Connection ...
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... AD5410/AD5420 TYPICAL PERFORMANCE CHARACTERISTICS EXTERNAL R 0.004 SET INTERNAL R SET EXTERNAL R , BOOST TRANSISTOR SET 0.002 INTERNAL R , BOOST TRANSISTOR SET 0 –0.002 –0.004 –0.006 25°C –0.008 A = 250Ω R LOAD –0.010 0 10,000 20,000 30,000 40,000 CODE Figure 7. Integral Nonlinearity Error vs. Code 1 ...
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... Figure 17. Integral Nonlinearity Error vs. AV 1.0 T 0.8 0mA TO 24mA RANGE 0.6 0.4 0.2 0 –0.2 SET –0.4 SET SET –0.6 SET SET –0.8 SET –1 Figure 18. Differential Nonlinearity Error vs. AV Rev Page AD5410/AD5420 = 25° ( External 25°C A 0mA TO 24mA RANGE (V) DD ...
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... AD5410/AD5420 1.0 0 25°C A 0.6 0mA TO 24mA RANGE 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 (V) DD Figure 19. Differential Nonlinearity Error vs. AV 0.025 T = 25°C A 0.020 0mA TO 24mA RANGE 0.015 0.010 0.005 0 –0.005 –0.010 –0.015 (V) DD Figure 20. Total Unadjusted Error vs. AV ...
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... CH1 4.0 4.5 5.0 CH3 5.00V 1 CH1 2µ Figure 29. Reference Noise (0 Bandwidth) 1 CH1 20µV –3 –1 1 Figure 30. Reference Noise (100 kHz Bandwidth) Rev Page AD5410/AD5420 AV DD REFERENCE OUTPUT 2.00V M200µs CH3 Figure 28. Reference Turn-on Transient M2.00s LINE M2.00s LINE 2.1V 1.8V 0V ...
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... AD5410/AD5420 25° 40V 10 DD OUTPUT DISABLED 0 – COMPLIANCE VOLTAGE (V) Figure 31. Output Leakage Current vs. Compliance Voltage 5.003 50 DEVICES SHOWN AV = 24V DD 5.002 5.001 5.000 4.999 4.998 4.997 –40 – TEMPERATURE (°C) Figure 32. Reference Output Voltage vs. Temperature ...
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... TUE is expressed in % FSR. A typical TUE vs. code plot can be seen in Figure 9. Monotonicity A DAC is monotonic if the output either increases or remains constant for increasing digital input code. The AD5410/AD5420 are monotonic over their full operating temperature range. Full-Scale Error Full-scale error is a measure of the output error when full-scale code is loaded to the data register. Ideally, the output should be full-scale − ...
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... The desired output configuration is user selectable via the control register. ARCHITECTURE The DAC core architecture of the AD5410/AD5420 consists of two matched DAC sections. A simplified circuit diagram is shown in Figure 37. The four MSBs of the 12-bit or 16-bit data-word are decoded to drive 15 switches E15 ...
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... N is the total number of AD5410/AD5420 devices in the chain. When the serial transfer to all devices is complete, LATCH is taken high. This latches the input data in each device in the daisy chain. The serial clock can be a continuous or a gated clock. A continuous SCLK source can be used only if LATCH is taken high after the correct number of clock cycles ...
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... The data register is addressed by setting the address byte of the input shift register to 0x01. The data to be written to the data register is entered in Position DB15 to Position DB4 for the AD5410 and in Position DB15 to Position DB0 for the AD5420, as shown in Table 12 and Table 13, respectively CONTROL REGISTER ...
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... DB6 Reserved Rev Page Description This bit is set if a fault is detected on the I This bit is set while the output value is slewing (slew rate control enabled). This bit is set if the AD5410/AD5420 core temperature exceeds approximately 150°C. DB6 DB5 DB4 DB3 DB2 ...
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... AD5410/AD5420 AD5410/AD5420 FEATURES FAULT ALERT The AD5410/AD5420 are equipped with a FAULT pin, which is an open-drain output allowing several AD5410/AD5420 devices to be connected together to one pull-up resistor for global fault detection. The FAULT pin is forced active by any one of the following fault scenarios: • ...
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... DIGITAL SLEW RATE CONTROL The slew rate control feature of the AD5410/AD5420 allows the user to control the rate at which the output current changes. With the slew rate control feature disabled, the output current changes at a rate of approximately µs (see Figure 36). ...
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... Capacitors can be placed between CAP1 and AV and shown in Figure 42 CAP1 AD5410/ CAP2 AD5420 I OUT GND Figure 42. I Filtering Capacitors OUT The capacitors form a filter on the current output circuitry, as shown in Figure 43, reducing the bandwidth and the slew rate of the output current ...
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... As well as being an additional component, the resistor increases the compliance voltage required. An alternative method is to use a resistor that is already in place such a resistor and is internal to the AD5410/AD5420, as shown in Figure 46. By measuring the voltage between the R3 and BOOST pins, the value of the SENSE ...
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... AD5410/AD5420 Using this information and Equation 2, two simultaneous equations can be generated from which the values of R3 and I can be calculated as follows: BIAS V = − OUT BIAS ⇒ = − BIAS OUT R 3 Simultaneous Equation 07955446 = − 00147965 ...
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... The printed circuit board (PCB) on which the AD5410/AD5420 are mounted should be designed so that the analog and digital sections are separated and confined to certain areas of the board. If the AD5410/AD5420 are in a system where multiple devices require an AGND-to-DGND connection, the connection should be made at one point only. ...
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... It is important that the device not be operated under conditions that cause the junction tempera- ture to exceed this value. Excessive junction temperature can occur if the AD5410/AD5420 are operated from the maximum AV , while driving the maximum current (24 mA) directly to DD ground ...
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... DD1 DD2 V V FAULT SDO OB IB GND GND 2 1 GND ADUM1200 Figure 53. AD5410/AD5420 in an Industrial Analog Output Application Rev Page AD5410/AD5420 iCoupler digital isolators; further information on 10µF SMAJ36CA 36V 0.1µ CAP1 CAP2 AD5410/AD5420 18Ω I OUT ...
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... Model 1 Temperature Range AD5410AREZ −40°C to +85°C AD5410AREZ-REEL7 −40°C to +85°C AD5410ACPZ-REEL −40°C to +85°C AD5410ACPZ-REEL7 −40°C to +85°C AD5420AREZ −40°C to +85°C AD5420AREZ-REEL7 −40°C to +85°C AD5420ACPZ-REEL −40°C to +85°C AD5420ACPZ-REEL7 −40°C to +85°C ...