AD5726 Analog Devices, AD5726 Datasheet - Page 6

• Manufacturer Part Number: AD5726
• Description: Quad, 12-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DAC
• Manufacturer: Analog Devices

Specifications of AD5726

• Resolution (bits): 12bit
• Dac Update Rate: 111kSPS
• Dac Settling Time: 9µs
• Max Pos Supply (v): +15.75V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

AD5726
TIMING CHARACTERISTICS
AV
C
Table 4.
Parameter
t
t
t
t
t
t
t
t
t
t
1
2
Timing Diagrams
DS
DH
CH
CL
CSS
CSH
LD1
LD2
LDW
CLRW
Guaranteed by design and characterization, not production tested.
All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
L
= 200 pF. All specifications T
DD
SCLK
LDAC
SDIN
SCLK
LDAC
= +15 V or +5 V, AV
CS
V
SDIN
OUT
CS
t
CL
t
t
CSS
LD1
t
DS
Figure 3. Data Load Timing
A1
t
CSH
t
t
DH
t
CH
SS
LD2
= −15 V or −5 V or 0 V, GND = 0 V; V
Limit at T
5
5
13
13
13
13
20
20
20
20
A0
MIN
t
LDW
to T
X
t
S
MIN
MAX
, T
, unless otherwise noted.
X
MAX
±1LSB
D11
Figure 2. Data Load Sequence
D10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. B | Page 6 of 20
D9
REFP
1, 2
Description
Data setup time
Data hold time
Clock pulse width high
Clock pulse width low
Select time
Deselect delay
Load disable time
Load delay
Load pulse width
Clear pulse width
D8
= +10 V or +2.5 V; V
CLRSEL
V
CLR
OUT
D4
D3
REFN
= −10 V or −2.5 V or 0 V, R
Figure 4. Clear Timing
D2
D1
t
CLRW
D0
t
t
S
CSH
t
LD2
±1LSB
LOAD
= 2 kΩ,