AD5644R Analog Devices, AD5644R Datasheet - Page 4

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AD5644R

Manufacturer Part Number
AD5644R
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5644R

Resolution (bits)
14bit
Dac Update Rate
250kSPS
Dac Settling Time
3.5µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5644RBRMZ-5
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD5624R/AD5644R/AD5664R
Parameter
LOGIC INPUTS
POWER REQUIREMENTS
1
2
3
4
5
AD5624R-3/AD5644R-3/AD5664R-3
V
Table 3.
Parameter
STATIC PERFORMANCE
Temperature range: B grade: −40°C to +105°C.
Linearity calculated using a reduced code range: AD5664R (Code 512 to Code 65,024); AD5644R (Code 128 to Code 16,256); AD5624R (Code 32 to Code 4064). Output
unloaded.
Guaranteed by design and characterization, not production tested.
Interface inactive. All DACs active. DAC outputs unloaded.
All DACs powered down.
DD
Input Current
V
V
Pin Capacitance
V
I
AD5664R
AD5644R
AD5624R
Zero-Code Error
Offset Error
Full-Scale Error
Gain Error
Zero-Code Error Drift
Gain Temperature Coefficient
DC Power Supply Rejection Ratio
DC Crosstalk
DD
INL
INH
DD
= 2.7 V to 3.6 V; R
Normal Mode
All Power-Down Modes
Resolution
Relative Accuracy
Differential Nonlinearity
Resolution
Relative Accuracy
Differential Nonlinearity
Resolution
Relative Accuracy
Differential Nonlinearity
External Reference
Internal Reference
, Input Low Voltage
, Input High Voltage
3
4
2
L
= 2 kΩ to GND; C
5
Min
2
4.5
Min
16
14
12
L
= 200 pF to GND; V
B Grade
B Grade
Typ
0.45
0.95
0.48
Typ
±8
±2
±0.5
2
±1
±2
−100
10
5
20
10
3
−0.1
±2.5
10
25
1
1
Max
±2
Max
±1
±0.5
±0.25
10
±10
±1.5
0.8
5.5
0.9
1.2
1
±16
±4
±1
±1
Rev. B | Page 4 of 28
REFIN
Unit
μA
V
V
pF
V
mA
mA
μA
Unit
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSB
LSB
mV
mV
% of FSR
% of FSR
μV/°C
ppm
dB
μV
μV/mA
μV
μV
μV/mA
μV
= V
DD
; all specifications T
Conditions/Comments
All digital inputs
V
V
V
Internal reference off
Internal reference on
Conditions/Comments
Guaranteed monotonic by design
Guaranteed monotonic by design
Guaranteed monotonic by design
All zeroes loaded to DAC register
All ones loaded to DAC register
Of FSR/°C
DAC code = midscale; V
Due to full-scale output change, R
Due to load current change
Due to powering down (per channel)
Due to full-scale output change, R
Due to load current change
Due to powering down (per channel)
DD
DD
IH
= V
= 5 V
= 5 V
DD
, V
IL
= GND, V
MIN
to T
DD
= 4.5 V to 5.5 V
DD
MAX
= 3 V ± 10%
, unless otherwise noted.
L
L
= 2 kΩ to GND or V
= 2 kΩ to GND or V
DD
DD

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