AD5060 Analog Devices, AD5060 Datasheet
AD5060
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AD5060 Summary of contents
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... DAC output powers up to midscale or zero scale and remains there until a valid write takes place to the device. The AD5040 and the AD5060 both contain a power-down feature that reduces the current con- sumption of the device to typically 330 and provides software-selectable output loads while in power-down mode ...
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... Software Reset ............................................................................. 16 Power-Down Modes .................................................................. 17 Microprocessor Interfacing ....................................................... 17 Applications ..................................................................................... 19 Choosing a Reference for the AD5040/ AD5060 ................... 19 Bipolar Operation Using the AD5040/ AD5060 .................... 19 Using the AD5040/AD5060 with a Galvanically Isolated Interface Chip ............................................................................. 20 Power Supply Bypassing and Grounding ................................ 20 ...
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... AD5040/AD5060 −40°C to +125°C AD5060 Y grade −40° 85°C, AD5040/AD5060 −40° 125°C, AD5060 Y grade A All 1s loaded to DAC register, AD5040 AD5060 −40°C to +85°C A All 1s loaded to DAC register −40°C to +125°C, AD5060 Y grade A ¼ ...
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... Temperature range for the A and B grades is −40° 85° C, typical at 25°C; temperature range for the Y grade is −40°C to +125°C. 2 Linearity calculated using a reduced code range (160 to code 65535 for AD5060 ) and (40 to code 16383 for AD5040). 3 Guaranteed by design and characterization, not production tested. ...
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... SCLK falling edge to SYNC rising edge ns min Minimum SYNC high time ns min SYNC rising edge to next SCLK fall ignore ) and timed from a voltage level D22 D2 D1 Figure 2. AD5060 Timing Diagram Rev Page AD5040/AD5060 + V )/ D23 D22 ...
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... Jc Reflow Soldering (Pb-free) Peak Temperature Time-at-Peak Temperature ESD (AD5040/AD5060) ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...
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... Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can be transferred at rates MHz. DIN 1 8 SCLK AD5040/ V AD5060 2 7 SYNC DD TOP VIEW DACGND V 3 (Not to Scale) 6 REF V AGND 4 5 OUT Figure 3. Pin Configuration Rev Page AD5040/AD5060 should be decoupled to GND. DD ...
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... 4.096V 0.08 REF T = 25°C A 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 –0.08 –0.10 160 10160 20160 30160 40160 DAC CODE Figure 6. Typical AD5060 TUE Plot –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 50160 60160 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 –0.05 –0.10 –0.15 –0.20 –0.25 –0.30 –0.35 –0.40 50160 60160 ...
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... AD5060 only. Rev Page AD5040/AD5060 V = 5.5V 4.096V DD REF V = 2.7V 2.0V DD REF MAX OFFSET ERROR @ V = 2.7V MAX OFFSET ERROR @ 5.5V DD MIN OFFSET ERROR @ V = 5.5V DD MIN OFFSET ERROR @ V = 2.7V DD –20 ...
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... MAX TUE ERROR @ V = 2.7V DD MIN TUE ERROR @ 100 120 140 1 MAX 5.5V DD MAX 2. 100 120 140 1 1 AD5060 only. Rev Page 1 5.5V FULL-SCALE 4.096V 1.6 REF = 25 ° THREE QUARTER SCALE A 1.4 1.2 1.0 MID-SCALE QUARTER-SCALE 0.8 ZERO-SCALE 0.6 0.4 0 10M 15M 20M ...
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... DAC CODE Figure 22. Typical Supply Current vs. Digital Input Code 24TH CLOCK FALLING CH1 = SCLK CH2 = V OUT CH2 50mV/DIV CH1 2V/DIV TIME BASE 400ns/DIV Figure 23. AD5060 Digital-to-Analog Glitch Impulse (See Figure 24) 0.117 0.116 0.115 0.114 0.113 0.112 0.111 0.110 0.109 ...
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... AD5040/AD5060 5.005 REF T = 25°C A 5.000 4.995 4.990 4.985 4.980 4.975 5.50 5.45 5.40 5.35 5.30 5.25 5.20 V (V) DD Figure 28. Typical Output vs. Supply Voltage CH3 = SCLK CH2 = V OUT CH1 = TRIGGER CH1 2V/DIV CH2 2V/DIV CH3 2V TIME BASE = 5.00μs Figure 29. Time to Exit Power-Down to Midscale 400 350 FULL-SCALE 300 ...
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... NO VALID EDGE C3 RISE 946.2μs CH3 1.36V 2.5V REF Rev Page AD5040/AD5060 2 5. 4.096V REF 10% TO 90% RISE TIME = 0.688 μ s SLEW RATE = 1.16V/ μ s 1.9 2.04V 1.8 1.7 1.6 1.5 DAC 1.4 OUTPUT 1.3 1.2 1.04V 1.1 1.0 –10 μ s –8 μ s – ...
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... LSB change between any two adjacent codes. A specified differential nonlinearity of ±1 LSB maximum ensures monotonicity. This DAC is guaranteed monotonic by design. A typical AD5060 DNL vs. code plot is shown in Figure 5. Offset Error Offset error is a measure of the output error when zero code (0x0000) is loaded to the DAC register ...
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... THEORY OF OPERATION The AD5040/AD5060 are single 14-/16-bit, serial input, voltage output DACs. The parts operate from supply voltages of 2 5.5 V. Data is written to the AD5060 in a 24-bit word format, and to the AD5040 in a 16-bit word format, via a 3-wire serial interface. Both the AD5040 and AD5060 incorporate a power-on reset circuit that ensures the DAC output powers known out- put state (midscale or zero-scale, see the Ordering Guide) ...
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... DAC while the process of powering up. SOFTWARE RESET The AD5060 device can be put into software reset by setting all bits in the DAC register to 1; this includes writing 1s to Bit D23 and Bit D16, which is not the normal mode of operation. For ...
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... These modes are software pro- grammable by setting two bits in the control register (Bit DB17 and Bit DB16 in the AD5060 and Bit DB15 and Bit DB14 in the AD5040). Table 6 and Table 7 show how the state of the bits corresponds to the operating mode of the two devices. ...
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... ADDITIONAL PINS OMITTED FOR CLARITY Figure 47. AD5040/AD5060 to Blackfin® ADSP-BF53x Interface AD5040/AD5060 to 80C51/80L51 Interface Figure 48 shows a serial interface between the AD5060/ AD5040 and the 80C51/80L51 microcontroller. The setup for the interface is: TxD of the 80C51/80L51 drives SCLK of the AD5040/AD5060 while RxD drives the serial data line of the part ...
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... V O ⎝ 65536 OUT Using the AD5060, this is an output voltage range of ±5 V with 0x0000 corresponding to a −5 V output and 0xFFFF corresponding output . +5V 10μF 0.1μF Figure 51. Bipolar Operation with the AD5040/AD5060 Rev Page AD5040/AD5060 Temp ...
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... The printed circuit board containing the AD5040/ AD5060 should have separate analog and digital sections, each having its own area of the board. If the AD5040/AD5060 are in a system where other devices require an AGND-to-DGND connection, the connection should be made at one point only. ...
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... AD5060ARJZ-2500RL7 −40°C to +85°C AD5060BRJZ-1500RL7 −40°C to +85°C AD5060BRJZ-1REEL7 −40°C to +85°C AD5060BRJZ-2REEL7 −40°C to +85°C AD5060BRJZ-2500RL7 −40°C to +85°C AD5060YRJZ-1500RL7 −40°C to +125°C AD5060YRJZ-1REEL7 −40°C to +125°C EVAL-AD5060EBZ RoHS Compliant Part. 3.00 2.90 2.80 8 ...
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... AD5040/AD5060 NOTES Rev Page ...
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... NOTES Rev Page AD5040/AD5060 ...
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... AD5040/AD5060 NOTES © 2005-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04767-0-1/10(A) Rev Page ...