AD5452 Analog Devices, AD5452 Datasheet - Page 4
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AD5452
Manufacturer Part Number
AD5452
Description
12-Bit High Bandwidth Multiplying DACs with Serial Interface
Manufacturer
Analog Devices
Datasheet
1.AD5453.pdf
(32 pages)
Specifications of AD5452
Resolution (bits)
12bit
Dac Update Rate
2.7MSPS
Dac Settling Time
160ns
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Ser,SPI
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AD5450/AD5451/AD5452/AD5453
Parameter
DYNAMIC PERFORMANCE
POWER REQUIREMENTS
1
Guaranteed by design and characterization, not subject to production test.
Reference-Multiplying BW
Multiplying Feedthrough Error
Output Voltage Settling Time
Digital Delay
10% to 90% Settling Time
Digital-to-Analog Glitch Impulse
Output Capacitance
Digital Feedthrough
Analog THD
Digital THD
Output Noise Spectral Density
SFDR Performance (Wide Band)
SFDR Performance (Narrow Band)
Intermodulation Distortion
Power Supply Range
Power Supply Sensitivity
Measured to ±1 mV of FS
Measured to ±4 mV of FS
Measured to ±16 mV of FS
I
I
50 kHz f
20 kHz f
50 kHz f
20 kHz f
50 kHz f
20 kHz f
I
OUT
OUT
DD
1
2
OUT
OUT
OUT
OUT
OUT
OUT
1
1
Min
2.5
Typ
12
72
64
44
100
24
16
20
10
2
13
28
18
5
0.5
83
71
77
25
78
74
87
85
79
0.4
Rev. E | Page 4 of 32
Max
110
40
33
40
30
5.5
10
0.6
0.001
Unit
MHz
dB
dB
dB
ns
ns
ns
ns
ns
nV-s
pF
pF
pF
pF
nV-s
dB
dB
dB
nV/√Hz
dB
dB
dB
dB
dB
V
μA
μA
%/%
Conditions
V
V
100 kHz
1 MHz
10 MHz
V
loaded with 0s and 1s
Interface delay time
Rise and fall times, V
1 LSB change around major carry, V
DAC latches loaded with all 0s
DAC latches loaded with all 1s
DAC latches loaded with all 0s
DAC latches loaded with all 1s
Feedthrough to DAC output with CS high and
alternate loading of all 0s and all 1s
V
Clock = 1 MHz, V
@ 1 kHz
Clock = 1 MHz, V
Clock = 1 MHz, V
f
T
T
∆V
1
A
A
REF
REF
REF
REF
= 20 kHz, f
= −40°C to +125°C, logic inputs = 0 V or V
= 25°C, logic inputs = 0 V or V
DD
= ±3.5 V, DAC loaded with all 1s
= ±3.5 V, DAC loaded with all 0s
= 10 V, R
= 3.5 V p-p, all 1s loaded, f = 1 kHz
= ±5%
2
LOAD
= 25 kHz, clock = 1 MHz, V
= 100 Ω; DAC latch alternately
REF
REF
REF
= 3.5 V
= 3.5 V
= 3.5 V
REF
= 10 V, R
LOAD
DD
REF
= 100 Ω
= 0 V
REF
= 3.5 V
DD