ADV7125 Analog Devices, ADV7125 Datasheet - Page 9

• Manufacturer Part Number: ADV7125
• Description: 330MHz Triple 8-Bit High Speed Video DAC
• Manufacturer: Analog Devices

Specifications of ADV7125

• Resolution (bits): 8bit
• Dac Update Rate: 330MSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): +5.25V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Par

Pin Number
37
38
49 (EPAD)
Mnemonic
R
PSAVE
EP (EPAD)
SET
Description
A resistor (R
signal. Note that the IRE relationships are maintained, regardless of the full-scale output current. The
relationship between R
is given by:
The relationship between R
The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC
tied permanently low.
Power Save Control Pin. Reduced power consumption is available on the ADV7125 when this pin is
active.
The LFCSP_VQ has an exposed paddle that must be connected to GND.
R
IOG (mA) = 11,444.8 × V
IOR, IOB (mA) = 7989.6 × V
SET
(Ω) = 11,445 × V
SET
) connected between this pin and GND controls the magnitude of the full-scale video
SET
Rev. C | Page 9 of 16
REF
and the full-scale output current on IOG (assuming I
(V)/IOG (mA)
SET
REF
and the full-scale output current on IOR, IOG, and IOB is given by:
REF
(V)/R
(V)/R
SET
(Ω) (SYNC being asserted)
SET
(Ω)
SYNC
is connected to IOG)
ADV7125