AD7398 Analog Devices, AD7398 Datasheet - Page 17

• Manufacturer Part Number: AD7398
• Description: Quad, Serial-Input 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of AD7398

• Resolution (bits): 12bit
• Dac Update Rate: 167kSPS
• Dac Settling Time: 6µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

Note that the 80C51/80L51 provide the LSB first, although the
AD7398/AD7399 expect the MSB of the 16-bit/14-bit word
first. Care should be taken to ensure the transmit routine takes
this into account. This can usually be done with software by
shifting out and accumulating the bits in the correct order
before inputting to the DAC. In addition, 80C51 outputs two
byte words/16 bits of data. Thus for AD7399, the first two bits,
after rearrangement, should be don’t care as they are dropped
from the 14-bit word of the AD7399.
Rev. C | Page 17 of 24
When data is to be transmitted to the DAC, P3.3 is taken low.
Data on RxD is valid on the falling edge of TxD, so the clock
must be inverted as the DAC clocks data into the input shift
register on the rising edge of the serial clock. The 80C51/80L51
transmit their data in 8-bit bytes with only eight falling clock
edges occurring in the transmit cycle. As the AD7399 requires a
14-bit word, P3.3 (or any one of the other programmable bits) is the
CS input signal to the DAC; therefore P3.3 should be brought low
at the beginning of the 16-bit write cycle 2 × 8 bit-words, and held
low until the 16-bit 2 × 8 cycle is completed. After that, P3.3 is
brought high again and the new data loads to the DAC. Again, the
first two bits, after rearranging, should be don’t care. LDAC on the
AD7398/AD7399 can also be controlled by the 80C51/80L51 serial
port output by using another bit-programmable pin, P3.4.
AD7398/AD7399