AD9754 Analog Devices, AD9754 Datasheet - Page 5

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AD9754

Manufacturer Part Number
AD9754
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD9754

Resolution (bits)
14bit
Dac Update Rate
125MSPS
Dac Settling Time
35ns
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par

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Pin No.
1
2–13
14
15
16
17
18
19, 25
20
21
22
23
24
26
27
28
REV. A
Name
DB13
DB12–DB1 Data Bits 1–12.
DB0
SLEEP
REFLO
REFIO
FS ADJ
NC
ACOM
IOUTB
IOUTA
ICOMP
AVDD
DCOM
DVDD
CLOCK
Description
Most Significant Data Bit (MSB).
Least Significant Data Bit (LSB).
Power-Down Control Input. Active High. Contains active pull-down circuit; it may be left unterminated if
not used.
Reference Ground when Internal 1.2 V Reference Used. Connect to AVDD to disable internal reference.
Reference Input/Output. Serves as reference input when internal reference disabled (i.e., Tie REFLO to
AVDD). Serves as 1.2 V reference output when internal reference activated (i.e., Tie REFLO to ACOM).
Requires 0.1 F capacitor to ACOM when internal reference activated.
Full-Scale Current Output Adjust.
No Connect.
Analog Common.
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
DAC Current Output. Full-scale current when all data bits are 1s.
Internal Bias Node for Switch Driver Circuitry. Decouple to ACOM with 0.1 F capacitor.
Analog Supply Voltage (+4.5 V to +5.5 V).
Digital Common.
Digital Supply Voltage (+2.7 V to +5.5 V).
Clock Input. Data latched on positive edge of clock.
PIN FUNCTION DESCRIPTIONS
(MSB) DB13
(LSB) DB0
PIN CONFIGURATION
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
10
11
12
13
14
NC = NO CONNECT
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD9754
–5–
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLOCK
DVDD
DCOM
NC
AVDD
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
ICOMP
AD9754

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