AD7392 Analog Devices, AD7392 Datasheet

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AD7392

Manufacturer Part Number
AD7392
Description
3 V, Parallel Input Micropower 12-Bit DACs
Manufacturer
Analog Devices
Datasheet

Specifications of AD7392

Resolution (bits)
12bit
Dac Update Rate
17kSPS
Dac Settling Time
60µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Par

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FEATURES
Micropower: 100 μA
0.1 μA typical power shutdown
Single-supply 2.7 V to 5.5 V operation
AD7392: 12-bit resolution
AD7393: 10-bit resolution
0.9 LSB differential nonlinearity error
APPLICATIONS
Automotive 0.5 V to 4.5 V output span voltage
Portable communications
Digitally controlled calibration
PC peripherals
GENERAL DESCRIPTION
The AD7392/AD7393 comprise a set of pin-compatible
10-/12-bit voltage output, digital-to-analog converters. The
parts are designed to operate from a single 3 V supply. Built
using a CBCMOS process, these monolithic DACs offer low
cost and ease of use in single-supply 3 V systems. Operation is
guaranteed over the supply voltage range of 2.7 V to 5.5 V,
making this device ideal for battery-operated applications.
The full-scale voltage output is determined by the external ref-
erence input voltage applied. The rail-to-rail REF
allows a full-scale voltage equal to the positive supply V
any value in between. The voltage outputs are capable of sourc-
ing 5 mA.
A data latch load of 12 bits with a 45 ns write time eliminates
wait states when interfacing to the fastest processors. Addition-
ally, an asynchronous RS input sets the output to a zero scale at
power-on or upon user demand.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
IN
to DAC
DD
or
OUT
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Both parts are offered with similar pinouts, which allows users
to select the amount of resolution appropriate for their applica-
tions without changing the circuit card.
The AD7392/AD7393 are specified for operation over the
extended industrial temperature range of −40°C to +85°C.
The AD7393AR is specified for the automotive temperature
range of −40°C to +125°C. The AD7392/AD7393 are available
in 20-lead PDIP and 20-lead SOIC packages.
For serial data input, 8-lead packaged versions, see the AD7390
and AD7391.
Micropower 10-/12-Bit DACs
V
REF
FUNCTIONAL BLOCK DIAGRAM
DGND
©1996–2007 Analog Devices, Inc. All rights reserved.
CS
AD7392
DAC REGISTER
3 V, Parallel Input
D0 TO D11
12-BIT
DAC
Figure 1.
AD7392/AD7393
12
12
RS
www.analog.com
V
V
SHDN
AGND
DD
OUT

Related parts for AD7392

AD7392 Summary of contents

Page 1

... The AD7392/AD7393 are specified for operation over the extended industrial temperature range of −40°C to +85°C. The AD7393AR is specified for the automotive temperature range of −40°C to +125°C. The AD7392/AD7393 are available in 20-lead PDIP and 20-lead SOIC packages. to DAC IN ...

Page 2

... AD7392/AD7393 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Timing Diagram ........................................................................... 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configurations and Function Descriptions ........................... 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 12 REVISION HISTORY 8/07—Rev Rev. C Changes to Specifications Section.................................................. 3 Changes to Table 3............................................................................ 6 Changes to Theory of Operation Section ...

Page 3

... Positive Supply Current Shutdown Supply Current Power Dissipation Power Supply Sensitivity 1 One LSB = V /4096 V for the 12-bit AD7392. REF 2 The first two codes (0x000, 0x001) are excluded from the linearity error measurement. 3 These parameters are guaranteed by design and not subject to production testing. ...

Page 4

... AD7392/AD7393 2.5 V, −40°C < T < +85°C, unless otherwise noted. REF A Table 2. AD7393 Parameter STATIC PERFORMANCE 1 Resolution 2 Relative Accuracy 2 Differential Nonlinearity Zero-Scale Error Full-Scale Voltage Error Full-Scale Temperature Coefficient 3 REFERENCE INPUT V Range REF IN Input Resistance 3 Input Capacitance ANALOG OUTPUT Output Current (Source) ...

Page 5

... TIMING DIAGRAM D11 DATA VALID ±0.1%FS OUT ERROR BAND Figure 2. Timing Diagram Rev Page AD7392/AD7393 ...

Page 6

... AD7392/AD7393 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter V to GND GND REF Logic Inputs to GND V to GND OUT I Short Circuit to GND OUT DGND to AGND Package Power Dissipation Thermal Resistance (θ 20-Lead PDIP (N 20) 20-Lead SOIC (R-20) Maximum Junction Temperature (T max) J Operating Temperature Range ...

Page 7

... Scale Figure 3. AD7392 Pin Configuration Table 4. AD7392 Pin Function Descriptions Pin No. Mnemonic Description 1 V Positive Power Supply Input. The specified range of operation SHDN Power Shutdown Active Low Input. DAC register contents are saved as long as power stays on the V SHDN = 0, CS strobes write new data into the DAC register ...

Page 8

... AD7392/AD7393 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 AD7392 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 512 1024 1536 2048 CODE (Decimal) Figure 5. AD7392 Integral Nonlinearity Error vs. Code 1.0 AD7393 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 128 256 384 512 CODE (Decimal) Figure 6. AD7393 Integral Nonlinearity Error vs. Code 25 AD7392 ...

Page 9

... Figure 15. Power Supply Rejection Ratio vs. Frequency LOGIC 105 125 Rev Page AD7392/AD7393 = LOGIC 2.5V REF = 25° 5.5V, CODE = 0x155 DD = 5.5V, CODE = 0x3FF DD = 2.7V, CODE = 0x155 DD = 2.7V, CODE = 0x355 10k 100k 1M CLOCK FREQUENCY (Hz) Figure 14 ...

Page 10

... Figure 20. Reference Multiplying Bandwidth 2.0 AD7392 1.8 V CODE = 0x768 1.6 T 1.4 1.2 1.0 0.8 0.6 0.4 0 REFERENCE VOLTAGE (V) Figure 21. Integral Nonlinearity Error vs. Reference Voltage 1.2 AD7392 SAMPLE SIZE = 50 1.0 0.8 CODE = 0xFFF 0.6 0.4 CODE = 0x000 0 100 200 300 400 HOURS OF OPERATION AT 150°C Figure 22. Long-Term Drift Accelerated by Burn-In 100k = 25° ...

Page 11

... TEMPERATURE (°C) Figure 24. Shutdown Current vs. Temperature 1.0 0.8 100µs 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 Figure 25. AD7392 Differential Nonlinearity Error vs. Code 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0 5.5V DD –0 2.5V REF SHDN = 0V –1 105 125 Figure 26. AD7393 Differential Nonlinearity Error vs. Code Rev ...

Page 12

... The parallel data interface DD consists write strobe and 12 data bits (D0 to D11) if utilizing the AD7392 or 10 data bits (D0 to D9) if utilizing the AD7393 pin is available to reset the DAC register to zero scale. This function is useful for power-on reset or system failure recovery to a known state. Additional power savings are accomplished by activating the SHDN pin, resulting in a 1.5 μ ...

Page 13

... Figure 30). This feature is useful if the user is driving one or more of the digital inputs with CMOS logic input voltage level while operating the AD7392/AD7393 power supply. If this interface is used, make sure that the V of the 5 V CMOS meets the V ...

Page 14

... DD UNIPOLAR OUTPUT OPERATION This is the basic mode of operation for the AD7392. The AD7392 is designed to drive loads as low as 5 kΩ in parallel with 100 pF (see Figure 32). The code table for this operation is shown in Table 7. The circuit can be configured with an external reference ...

Page 15

... V The micropower REF195 is guaranteed to source 10 mA output drive current, but consumes only 50 μA internally. If higher resolution is required, the AD7392 can be used with two additional bits of data inserted into the software coding, which results in a 2.5 mV LSB step size. Table 8 shows examples of nominal output voltages (V operation circuit application ...

Page 16

... AD7392/AD7393 OUTLINE DIMENSIONS 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 1.060 (26.92) 1.030 (26.16) 0.980 (24.89 0.280 (7.11) 0.250 (6.35) 1 0.240 (6.10) 10 0.100 (2.54) BSC 0.060 (1.52) 0.015 (0.38) 0.015 (0.38) MIN GAUGE PLANE SEATING PLANE 0.005 (0.13) MIN 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN ...

Page 17

... ORDERING GUIDE Model Resolution (Bits) AD7392AN 12 1 AD7392ANZ 12 AD7392AR 12 AD7392AR-REEL 12 AD7392ARZ AD7392ARZ-REEL 12 AD7393AN 10 AD7393AR 10 1 AD7393ARZ RoHS Compliant Part. Temperature Range Package Description −40°C to +85°C 20-Lead PDIP −40°C to +85°C 20-Lead PDIP −40°C to +85°C 20-Lead SOIC_W − ...

Page 18

... AD7392/AD7393 NOTES Rev Page ...

Page 19

... NOTES Rev Page AD7392/AD7393 ...

Page 20

... AD7392/AD7393 NOTES ©1996–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01121-0-8/07(C) Rev Page ...

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