AD7835 Analog Devices, AD7835 Datasheet - Page 23

• Manufacturer Part Number: AD7835
• Description: LC2MOS Quad 14-Bit DAC
• Manufacturer: Analog Devices

Specifications of AD7835

• Resolution (bits): 14bit
• Dac Update Rate: 100kSPS
• Dac Settling Time: 10µs
• Max Pos Supply (v): +15.75V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Byte,Par

APPLICATIONS INFORMATION
SERIAL INTERFACE TO MULTIPLE AD7834S
Figure 33 shows how the package address pins of the AD7834
are used to address multiple AD7834s. This figure shows only
10 devices, but up to 32 AD7834s can each be assigned a unique
address by hardwiring each of the package address pins to V
or DGND. Normal operation of the device occurs when
is low. When serial data is being written to the AD7834s, only
the device with the same package address as the package address
contained in the serial data accepts data into the input registers.
Conversely, if
the data is loaded into the same channel on each package.
The primary limitation with multiple packages is the output
update rate. For example, if an output update rate of 10 kHz is
required, 100 μs are available to load all DACs. Assuming a
serial clock frequency of 10 MHz, it takes 2.5 μs to load data to
one DAC. Thus, 40 DACs or 10 packages can be updated in this
time. As the update rate requirement decreases, the number of
possible packages increases.
OPTO-ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD7834
makes it ideal for opto-isolated interfaces because the number
of interface lines is kept to a minimum.
1
ADDITIONAL PINS OMITTED FOR CLARITY
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
CONTROL OUT
CONTROL OUT
SYNC OUT
Figure 33. Serial Interface to Multiple AD7834s
PAEN is high, the package address is ignored, and
PAEN
LDAC
FSYNC
SCLK
DIN
PAEN
LDAC
FSYNC
SCLK
DIN
PAEN
LDAC
FSYNC
SCLK
DIN
AD7834
AD7834
AD7834
DEVICE 0
DEVICE 1
DEVICE 9
PA0
PA1
PA2
PA3
PA4
PA0
PA1
PA2
PA3
PA4
PA0
PA1
PA2
PA3
PA4
1
1
1
V
V
CC
CC
PAEN
CC
Rev. D | Page 23 of 28
Figure 34 shows a 5-channel isolated interface to the AD7834.
Multiple devices are connected to the outputs of the opto-coupler
and controlled as for serial interfacing. To reduce the number of
opto-isolators, the
is not used. If the PAEN line is not controlled by the microcon-
troller, it should be tied low at each device. If simultaneous updat-
ing of the DACs is not required, the
be tied permanently low and another opto-isolator is not needed.
AUTOMATED TEST EQUIPMENT
The AD7834/AD7835 are particularly suited for use in an
automated test environment. Figure 35 shows the AD7835
providing the necessary voltages for the pin driver and the
window comparator in a typical ATE pin electronics configur-
ation. Two AD588s are used to provide reference voltages for
the AD7835. In the configuration shown, the AD588s are
configured so that the voltage at Pin 1 is 5 V greater than the
voltage at Pin 9 and the voltage at Pin 15 is 5 V less than the
voltage at Pin 9.
One
DACs are used to provide high and low levels for the pin driver.
The pin driver can have an associated offset. This can be nulled
by applying an offset voltage to Pin 9 of the AD588. First, the
code 1000 . . . 0000 is loaded into the DAC 1 latch, and the pin
driver output is set to the DAC 1 output. The V
adjusted until 0 V appears between the pin driver output and
DUT GND. This causes both V
set with respect to AGND by an amount equal to V
However, the output of the pin driver varies from −5 V to +5 V
with respect to DUT GND as the DAC input code varies from
000 . . . 000 to 111 . . . 111. The V
the DSGA pin. When a clear is performed on the AD7835, the
output of the pin driver is 0 V with respect to DUT GND.
AD588
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
CONTROL OUT
CONTROL OUT
is used as a reference for DAC 1 and DAC 2. These
SYNC OUT
Figure 34. Opto-Isolated Interface
PAEN line doesn’t need to be controlled if it
OPTO-COUPLER
V
REF
OFFSET
CC
(+)A and V
LDAC pin on each part can
voltage is also applied to
AD7834/AD7835
REF
OFFSET
(−)A to be off-
TO FSYNCs
TO SCLKs
TO PAENs
TO LDACs
TO DINs
OFFSET
voltage is
.