AD7804 Analog Devices, AD7804 Datasheet
AD7804
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AD7804 Summary of contents
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... Process Control and Voltage Setpoint Control Trim Potentiometer Replacement Automatic Calibration GENERAL DESCRIPTION The AD7804/AD7808 are quad/octal 10-bit digital-to-analog converters, with serial load capabilities, while the AD7805/AD7809 are quad/octal 10-bit digital-to-analog converters with parallel load capabilities. These parts operate from a +3 10%) power supply and incorporates an on-chip reference ...
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... AD7804/AD7805/AD7808/AD7809 AD7804/AD7805–SPECIFICATIONS Reference = Internal Reference 100 pF Parameter B Grade STATIC PERFORMANCE MAIN DAC Resolution 10 Relative Accuracy Gain Error 2 Bias Offset Error –80/+40 3 –V Zero-Scale Error Monotonicity 9 Minimum Load Resistance 2 SUB DAC Resolution 8 Differential Nonlinearity OUTPUT CHARACTERISTICS 3 Output Voltage Range V V Voltage Output Settling Time to 10 Bits ...
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... Temperature range is – + Can be minimized using the Sub DAC the center of the output voltage swing and can be V BIAS Specifications subject to change without notice. REV. A AD7804/AD7805/AD7808/AD7809 (AV and GND. Sub DAC at Midscale. All specifications ...
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... DB0 Figure 1. Timing Diagram for AD7804 and AD7808 –4– 10 10%; AGND = DGND = 0 V; Reference = Description CLKIN Cycle Time CLKIN High Time CLKIN Low Time FSIN Setup Time Data Setup Time Data Hold Time LDAC Hold Time ...
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... DATA 1 LDAC 2 LDAC CLR 1 TIMING REQUIREMENTS FOR SYNCHRONOUS LDAC UPDATE OR LDAC MAY BE TIED PERMANENTLY LOW IF REQUIRED. 2 TIMING REQUIREMENTS FOR ASYNCHRONOUS LDAC UPDATE. Figure 2. Timing Diagram for AD7805/AD7809 Parallel Write REV. A AD7804/AD7805/AD7808/AD7809 3 unless otherwise noted.) MIN MAX , T MIN MAX ...
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... OUT Input Current to Any Pin Except Supplies Operating Temperature Range AD7804/AD7805 Commercial Plastic (B, C Versions – +85 C AD7808/AD7809 Commercial Plastic (B, C Versions – +85 C Storage Temperature Range . . . . . . . . . . . . – +150 C Junction Temperature ...
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... SDIN 7 DGND 8 REV. A AD7804/AD7808 PIN FUNCTION DESCRIPTION Description Ground reference point for analog circuitry. Analog output voltage from the DACs. Reference Output. This is a bandgap reference and is typically 1.23 V. Active low input used to put the part into low power mode reducing current consumption ...
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... AD7804/AD7805/AD7808/AD7809 AD7805 AD7809 Pin No. Pin No. Mnemonic 1, 11, 13 39, 40 AGND OUT OUT 4 43 REFOUT 5–10 DB9–DB2 12, 13 10, 15, 23 19, 20 24, 26 DB1, DB0 OUT OUT LDAC DGND ...
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... Figure 1. Two mode bits (MD1 and MD0) which are DB13 and DB14 of the serial word written to the AD7804/AD7808 are used to deter- mine whether writing is to the DAC data registers or the control registers of the device. These parts contain a system control ...
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... DB15 (MSB) X MD0 = 1 MD1 = 0 A2 Don’t Care *Applicable to the AD7808 Only, and Are Don’t Care Conditions when Operating the AD7804 . Figure 5. AD7804/AD7808 Channel Control Register Loading Sequence DB15 (MSB) MAIN/SUB MD0 = X MD1 = 1 A2 Don’t Care *Applicable to the AD7808 Only, and Are Don’t Care Conditions when Operating the AD7804 . ...
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... Bits A2, A1 and A0 in the input registers are used to address a specific DAC. Table IIa shows the selection table for the DACs of the AD7804. Table IIb shows the selection table for the DACs of the AD7808. Table IIa. DAC Selection Table for the AD7804 ...
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... DAC and the final 10 bits contain the data. To write half scale to channel A Sub DAC, then A200 should be written to the input register. The flowchart in Figure 10 shows in graphic form the steps required in communicating with the AD7804/AD7808. MX0 0 0 Figure 10. Flowchart for Controlling the DAC Following ...
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... The external mode pin must be taken high to allow data to be written to the DAC data registers. Figure 14 shows the bit allo- cations when 10-bit parallel operation is selected in the system control register. REV. A AD7804/AD7805/AD7808/AD7809 DB9 /16. BIAS DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 X = Don’ ...
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... AD7804/AD7805/AD7808/AD7809 Table IVb. AD7809 DAC Data/Control Register Selection Table MODE ...
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... Main DAC, and when high, writing is to the Sub DAC data register. In the 8+2 mode the channel con- trol register does not have to be accessed to switch between writing to the Main and Sub DACs as in the 10-bit parallel REV. A AD7804/AD7805/AD7808/AD7809 WRITE TO CHANNEL CONTROL REGISTER WRITE TO MAIN DAC DATA REGISTER ...
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... WR, an automatic or synchronous update will take place. LDAC input can be tied permanently low or have timing similar to that of the data inputs to operate in the synchronous mode. If LDAC is high during the sample period, the AD7804/AD7805/ AD7808/AD7809 assumes an asynchronous update. When in the asynchronous mode, an LDAC setup time has to be allowed following the sixteenth falling clock edge or the rising edge of WR before the LDAC can be activated ...
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... NA ranges from –512 to +511 and NB ranges from –128 to +127. Figure 28 shows a pictorial view of the transfer function for any DAC. REV. A AD7804/AD7805/AD7808/AD7809 Configuring the AD7805/AD7809 for Twos Complement Coding Figure 24 shows a typical configuration for the AD7805/AD7809. The circuit can be used for either 3 operation and uses the internal V lel interfacing is used ...
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... AD7804/AD7805/AD7808/AD7809 Table VI and Figure 22 show the analog outputs available for the above configuration. The following is the procedure re- quired if the complete transfer function needs to be offset around the V point. Table VII and Figure 23 show the ana- BIAS log output variations available from the Sub DAC. ...
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... F 1/256 127/256 SERIAL INTERFACE DV DD Figure 27. Typical Configuration for AD7804/AD7808 Using an AD589 1.23 V Reference for the AD7804/AD7808 System Control Register Serial Write: Write 0060 Hex Mode bits select system control register Channel Control Register Serial Write Write 4210 Hex Main DAC Data Register Serial Write: ...
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... The external REFIN pin should also be shielded with analog ground from the digital pins located next to it. The same precautions should be taken with the reference pins on the AD7804/AD7808 to reduce the risk of noise pickup and feedthrough. Reference Settling Time With the REFOUT on the AD7804/AD7805/AD7808/AD7809 decoupled with a 0 ...
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... Typical Performance Characteristics–AD7804/AD7805/AD7808/AD7809 0.150000 MAIN DAC = ZERO SCALE SUB DAC = MID SCALE 0.125000 BIAS + 0.100000 V = 5.5V DD 0.075000 0.050000 DD 0.025000 SOURCE CURRENT SINK CURRENT 0.000000 –0.5 –0.4 –0.3 –0.2 –0.1 0.0 CURRENT – mA Figure 29. Sink and Source Current with Zero Scale Loaded to DAC ...
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... Data is trans- mitted MSB first. In order to load data to the AD7804/AD7808, PC7 is left low after the first eight bits are transferred and a second serial write operation is performed to the DAC and then PC7 is taken high at the end of this procedure ...
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... D0 **ADDITIONAL PINS OMITTED FOR CLARITY **A2 CONTAINED ON THE AD7809 ONLY Figure 39. AD7805/AD7809–TMS32020 Interface REV. A AD7804/AD7805/AD7808/AD7809 Again fast interface timing allows the AD7805/AD7809 inter- face directly to the processor. Data is loaded to the AD7805/ AD7809 input latch using the following instruction: OUT DAC, D. DAC = Decoded DAC Address. ...
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... AD7804/AD7808 from the controller. This can easily be achieved by using opto-isolators which will provide isolation in excess of 3 kV. The serial loading structure of the AD7804/ AD7808 makes it ideally suited for use in opto-isolated appli- cations. Figure 41 shows an opto-isolated interface to the AD7804/AD7808 where SDIN, CLKIN and FSIN are driven from optocouplers ...
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... Dual External Reference Input Capability It is possible to operate the AD7804/AD7805/AD7808/AD7809 with two externally applied references. Figure 45 shows the connections for the AD7804. Reference one, the AD589, is connected to the REFIN pin of the part; the second reference, the AD780, is used to overdrive the internal VDD/2 reference which is provided at the COMP pin of the device ...
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... AD7804/AD7805/AD7808/AD7809 PAGE INDEX (AD7804/AD7808 SERIAL INTERFACE PART) Topic Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2, 3 Timing Information Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . 6 Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Function Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Terminology Relative Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Differential Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Bias Offset Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Gain Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Zero-Scale Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Digital-to-Analog Glitch Impulse ...
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... AD7804/AD7805/AD7808/AD7809 Plastic DIP (N-16) 0.840 (21.33) 0.745 (18.93 0.280 (7.11) 0.240 (6.10 0.060 (1.52) PIN 1 0.015 (0.38) MAX 0.130 (3.30) MIN 0.100 0.070 (1.77) SEATING 0.022 (0.558) PLANE (2 ...
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... AD7804/AD7805/AD7808/AD7809 Plastic DIP (N-24 PIN 1.275 (32.30) 1.125 (28.60) 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.92) 0.022 (0.558) 0.100 (2.54) 0.070 (1.77) 0.014 (0.356) BSC 0.045 (1.15) SOIC (R-24) 0.614 (15.6) 0.598 (15. 0.299 (7.6) 0.291 (7. PIN 1 0.104 (2.65) 0.093 (2.35) 0.012 (0.3) 0.0500 (1.27) 0.019 (0.49) SEATING 0.013 (0.32) BSC PLANE 0.004 (0.1) 0.014 (0.35) 0.009 (0.25) OUTLINE DIMENSIONS Dimensions shown in inches and (mm) ...