AD7849 Analog Devices, AD7849 Datasheet - Page 14

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AD7849

Manufacturer Part Number
AD7849
Description
Serial Input, 14-Bit/16-Bit DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7849

Resolution (bits)
16bit
Dac Update Rate
143kSPS
Dac Settling Time
7µs
Max Pos Supply (v)
+15.75V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Ser

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Unipolar Configuration
Figure 20 shows the AD7849 in the unipolar binary circuit
configuration. The DAC is driven by the AD586, 5 V reference.
Because R
and the output range is 0 V to 10 V. If a 0 V to 5 V range is
required, R
stage for a gain of ×1. Table 7 gives the code table for the circuit
shown in Figure 20.
Table 7. Code Table for Figure 20
Binary Number in DAC Latch
MSB
1111 1111 1111 1111
1000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0000
Table 7 assumes a 16-bit resolution; 1 LSB = 10 V/2
10 V/65,536 = 152 μV.
Offset and gain can be adjusted in Figure 20 as follows:
If a simple resistor divider is used to vary the V
important that the temperature coefficients of these resistors
match that of the DAC input resistance (−300 ppm/°C). Otherwise,
extra offset errors will be introduced over temperature. Many
circuits do not require these offset and gain adjustments. In
these circuits, R1 can be omitted. Pin 5 of the AD586 may be
left open circuit, and Pin 2 (V
AD7849
1nF
*
C1
ADDITIONAL PINS OMITTED FOR CLARITY.
To adjust offset, disconnect the V
DAC with all 0s, and adjust the V
To adjust gain, load the AD7849 with all 1s and adjust R1
until V
B and C versions. For the 14-bit A version, V
10 (16,383/16,384) = 9.9993896 V.
SIGNAL GND
8
AD586
OFS
2
4
OFS
OUT
is tied to 0 V, the output amplifier has a gain of ×2,
should be tied to V
5
= 10 (65,535/65,536) = 9.9998474 V for the 16-bit,
6
Figure 20. Unipolar Binary Operation
R1
10kΩ
REF−
V
V
LSB
REF+
+15V
REF–
V
) of the AD7849 tied to 0 V.
OUT
AD7849*
DD
–15V
V
, configuring the output
REF−
REF−
SS
Analog Output (V
10 (65,535/65,536) V
10 (32,768/65,536) V
10 (1/65,536) V
0 V
+5V
AGND
DGND
V
V
R
input from 0 V, load the
voltage until V
CC
OUT
OFS
REF−
OUT
V
(0V TO 10V)
voltage, it is
16
OUT
=
should be
OUT
OUT
= 0 V.
)
Rev. C | Page 14 of 20
Bipolar Configuration
Figure 21 shows the AD7849 set up for ±10 V bipolar operation.
The
fed to the V
for the circuit shown in Figure 21 is shown in Table 8.
Full-scale and bipolar-zero adjustment are provided by varying
the gain and balance on the AD588. R2 varies the gain on the
AD588, while R3 adjusts the +5 V and −5 V outputs together
with respect to ground.
100kΩ
Table 8. Code Table for Figure 21
Binary Number in DAC Latch
MSB
1111 1111 1111 1111
1000 0000 0000 0001
1000 0000 0000 0001
0111 1111 1111 1111
0000 0000 0000 0000
Table 8 assumes a 16-bit resolution; 1 LSB = 20 V/2
For bipolar-zero adjustment on the AD7849, load the DAC with
100 … 000 and adjust R3 until V
by loading the DAC with all 1s and adjusting R2 until V
9.999694 V.
When bipolar-zero and full-scale adjustment are not needed,
omit R2 and R3, connect Pin 11 to Pin 12 on the
leave Pin 5 on the AD588 floating.
If a ±5 V output range is desired with the circuit shown in
Figure 21, tie Pin 20 (R
output gain stage to unity and giving an output range of ±5 V.
*ADDITIONAL PINS OMITTED FOR CLARITY
R2
AD588
100kΩ
R3
1µF
C1
REF+
provides precision ±5 V tracking outputs that are
and V
10
11
7
9
5
Figure 21. Bipolar ±10 V Operation
12
39kΩ
AD588
4
R1
REF−
8
OFS
6
13
) to Pin 19 (V
inputs of the AD7849.The code table
15
14
16
2
3
1
LSB
OUT
V
V
= 0 V. Full scale is adjusted
+15V
REF+
V
REF–
AD7849*
DD
Analog Output (V
+10 (32,767/32,768) V
+10 (1/32,768) V
0 V
−10 (1/32,768) V
−10 (32,768/32,768) V
OUT
–15V
V
SS
), thus reducing the
AGND
DGND
+5V
V
R
V
CC
OUT
OFS
AD588
16
V
(–10V TO +10V)
SIGNAL
GND
OUT
= 305 μV.
OUT
OUT
and
)
=

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