AD768 Analog Devices, AD768 Datasheet - Page 7
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AD768
Manufacturer Part Number
AD768
Description
16-Bit, 30 MSPS D/A Converter
Manufacturer
Analog Devices
Datasheet
1.AD768.pdf
(20 pages)
Specifications of AD768
Resolution (bits)
16bit
Dac Update Rate
30MSPS
Dac Settling Time
25ns
Max Pos Supply (v)
+5.25V
Single-supply
No
Dac Type
Current Out
Dac Input Format
Par
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REV. B
REFERENCE OUTPUT
The internal 2.5 V bandgap reference is provided for generation
of the I
a capacitor of 0.1 F or greater from REFOUT to REFCOM. If
an external reference is used, REFOUT should be tied directly
to the positive supply voltage, V
internal reference, eliminating the need for the external capaci-
tor at REFOUT. The reference is specified to drive a nominal
load of 5 mA with a maximum of 15 mA. Operation with a
heavier load will result in degradation of supply rejection and
reference voltage accuracy. Therefore, the reference output
should be buffered with an amplifier when additional load cur-
rent is required. A properly sized pull-up resistor can also be
used to source additional current to the load. The resistors value
should be selected such that REFOUT will always source a
minimum of 5 mA to IREFIN and the additional load.
TEMPERATURE CONSIDERATIONS
Note that the reference plays a key role in the overall tempera-
ture performance of the AD768. Any drift of I
directly in I
of I
mized. This can be done by using the internal temperature com-
pensated reference for V
resistor for R
tion of a resistor ratio, not an absolute resistor value. By select-
ing resistors with matched temperature coefficients for R
and R
optimal drift performance.
REFERENCE NOISE REDUCTION AND MULTIPLYING
BANDWIDTH
For application flexibility and multiplying capabilities, the refer-
ence amplifier is designed to offer adjustable bandwidth that can
be reduced by connecting an external capacitor from the NR
node to the negative supply pin, V
bandwidth and acts as a filter to reduce the noise contribution
from the reference amplifier.
The noise reduction capacitor, C
and does not affect the settling time of the DAC output. With-
out this capacitor, the I
high frequency modulation of the DAC full-scale range through
the reference input node. Figure 7 shows the relationship be-
tween the external noise reduction capacitor and the –3 dB
bandwidth of the reference amplifier.
REFIN
LOAD,
REFIN
(which depends on both V
OUT.
the drift in the resistor values will cancel, providing
Figure 6. Typical Reference Hookup
current, and must be compensated externally with
REF.
C
When the output is taken as a current, the drift
REFCOMP
If the output is taken as a voltage, it is a func-
1µF
REFIN
REF
and a low temperature coefficient
bandwidth is 15 MHz allowing
500
DD
NR
EE
. This effectively turns off the
, is not required for stability
REF
6
3
5
. This capacitor limits the
REFOUT
IREFIN
REFCOM
and R
AD768
REF
REFIN
) must be mini-
shows up
REF
–7–
Figure 7. External Noise Reduction Capacitor vs. –3 dB
Bandwidth
The sensitivity of the NR node requires that care be taken in
capacitor placement. The capacitor should be located as physi-
cally close to the package pins as possible and lead lengths
should be minimized. For this purpose, the use of a chip
capacitor is recommended. For applications that do not require
high frequency modulation at IREFIN, it is recommended that
a capacitor on the order of 1 F be connected from NR to V
If the reference input is purely dc, noise may be minimized with
multiple capacitors, such as 1 F and 0.1 F, to more effectively
filter both high and low frequency disturbances.
ANALOG OUTPUTS
The AD768 offers two analog outputs; IOUTA is trimmed for
optimal INL and DNL performance and has a full-scale output
when all bits are high. For applications that require the specified
dc accuracy, IOUTA should be used. IOUTB is the comple-
mentary output with full-scale output when all bits are low.
Both IOUTA and IOUTB provide similar dynamic perfor-
mance. Refer to Figures 8 and 9 for typical INL and DNL per-
formance curves. The outputs can also be used differentially.
Refer to the section “Applying the AD768” for examples of vari-
ous output configurations.
100M
100k
10M
10k
1M
1k
–2
–4
–6
–8
10p
8
6
4
2
0
0
Figure 8. Typical INL Performance
5
10
100p
15
NOISE REDUCTION CAPACITOR – F
20
DIGITAL INPUT CODE – k
25
1n
30
35
40
10n
45
50
100n
55
AD768
60
65
1µ
EE
.