AD7945 Analog Devices, AD7945 Datasheet - Page 6

• Manufacturer Part Number: AD7945
• Description: +3.3 V/+5 V Multiplying 12-Bit DAC With a Parallel Interface
• Manufacturer: Analog Devices

Specifications of AD7945

• Resolution (bits): 12bit
• Dac Update Rate: 1.7MSPS
• Dac Settling Time: 600ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

AD7943/AD7945/AD7948
AD7945 TIMING SPECIFICATIONS
Parameter
t
t
t
t
t
NOTES
1
Specifications subject to change without notice.
AD7948 TIMING SPECIFICATIONS
Parameter
t
t
t
t
t
t
t
NOTES
1
Specifications subject to change without notice.
All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
DS
DH
CS
CH
WR
All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
DS
DH
CWS
CWH
LWS
LWH
WR
Limit @
V
35
10
60
0
60
Limit @
45
10
0
0
0
0
60
V
DD
DD
= +3 V to +3.6 V
= +3 V to +3.6 V
DB7–DB0
DB11–DB0
CSMSB
CSLSB
LDAC
WR
WR
CS
t
CWS
Limit @
V
20
10
40
0
40
Limit @
V
30
10
0
0
0
0
40
Figure 3. AD7945 Timing Diagram
Figure 4. AD7948 Timing Diagram
t
DD
DD
DS
1
1
= +4.5 V to +5.5 V
(T
= +4.5 V to +5.5 V
t
(T
WR
A
VALID
DATA
A
= T
= T
MIN
MIN
to T
t
t
to T
CWH
DH
t
–6–
MAX
CS
MAX
t
, unless otherwise noted)
WR
, unless otherwise noted)
t
t
CWS
LWS
t
DATA VALID
DS
t
DS
Units
ns min
ns min
ns min
ns min
ns min
Units
ns min
ns min
ns min
ns min
ns min
ns min
ns min
t
WR
t
t
VALID
DATA
DH
CH
t
t
CWH
LWH
t
DH
Description
Data Setup Time
Data Hold Time
Chip Select Setup Time
Chip Select Hold Time
Write Pulsewidth
Description
Data Setup Time
Data Hold Time
CSMSB or CSLSB to WR Setup Time
CSMSB or CSLSB to WR Hold Time
LDAC to WR Setup Time
LDAC to WR Hold Time
Write Pulsewidth
REV. B