AD7948 Analog Devices, AD7948 Datasheet
AD7948
Specifications of AD7948
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AD7948 Summary of contents
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... Outline Package) and 20-lead SSOP (Shrink Small Outline Package). The AD7945 is available in 20-lead DIP, 20-lead SOP and 20- lead SSOP. The AD7948 is available in 20-lead DIP, 20-lead SOP and 20- lead SSOP. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use ...
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... AD7948) DD NOTES 1 The AD7943, AD7945 and AD7948 are specified in the normal current mode configuration and in the biased current mode for single-supply applications. Figures 14 and 15 are examples of normal mode operation. 2 Temperature ranges as follows: B Grades: – + Grade: – +125 C. ...
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... SPECIFICATIONS BIASED MODE (AD7943 +5 wise noted. AD7945, AD7948 +5 Parameter ACCURACY Resolution Relative Accuracy Differential Nonlinearity Gain Error @ + MIN MAX 3 Gain Temperature Coefficient Output Leakage Current I OUT1 @ + MIN MAX Input Resistance @ I Pin (AD7943) ...
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... Output Capacitance Digital Feedthrough Digital Feedthrough (AD7945, AD7948) Total Harmonic Distortion Output Noise Spectral Density @ 1 kHz Specifications subject to change without notice AGND = 0 V. AD7945, AD7948: V IOUT1 IOUT2 = DAC output op amp is AD843; unless otherwise noted.) These characteristics are in- MIN MAX B Grades ...
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... OL TO OUTPUT PIN C L 50pF 200 –5– AD7943/AD7945/AD7948 Description STB Pulsewidth Data Setup Time Data Hold Time SRI Data Pulsewidth Load Pulsewidth CLR Pulsewidth Min Time Between Strobing Input Shift Register and Loading DAC Register STB Clocking Edge to SRO Data Valid Delay ...
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... CWS t LWS DATA VALID Figure 4. AD7948 Timing Diagram –6– Description Data Setup Time Data Hold Time Chip Select Setup Time Chip Select Hold Time Write Pulsewidth Description Data Setup Time Data Hold Time CSMSB or CSLSB to WR Setup Time ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7943/AD7945/AD7948 feature proprietary ESD protection circuitry, perma- nent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... AGND. OUT1 terminal, when all 0s are OUT1 pin and subsequently on OUT1 DIP/SOP/SSOP OUT1 19 V AGND 2 REF V DGND AD7945 AD7948 WR CSMSB 17 TOP VIEW 4 TOP VIEW (Not to Scale DF/DOR CTRL 15 DB0 6 DB7 (MSB) 14 DB1 7 DB6 13 DB2 8 DB5 ...
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... Power supply input. This is nominally +5 V for Normal Mode Operation and +3 for Biased Mode DD Operation. V DAC reference input. REF R DAC feedback resistor pin. FB REV. B AD7943 PIN FUNCTION DESCRIPTIONS AD7945 PIN FUNCTION DESCRIPTIONS –9– AD7943/AD7945/AD7948 terminal is also connected OUT2 ...
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... WR Write input, active low. This active low signal, in combination with others is used in loading external data into the AD7948 input register and in transferring data from the input register to the DAC register. V Power supply input. This is nominally +5 V for Normal Mode Operation and +3 for Biased Mode DD Operation ...
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... Figure 7. All Codes Linearity In Normal Mode ( + + AMP = AD843 Figure 8. Linearity Error vs. V –11– AD7943/AD7945/AD7948 +10V REF OP AMP = AD843 1024 2048 3072 0 INPUT CODE V = +3. + AMP = AD820 0 ...
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... AD7943/AD7945/AD7948 1. +3. REF V = 1.23V BIAS OP AMP = AD820 0. + 0.00 –0.50 –1.00 0 1024 2048 INPUT CODE Figure 9. All Codes Linearity in Biased Mode ( –50 –55 –60 –65 –70 –75 –80 –85 –90 –95 –100 100 1k FREQUERCY – Hz Figure 10. Total Harmonic Distortion vs. Frequency ...
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... UNIPOLAR BINARY OPERATION (Two-Quadrant Multiplication) Figure 14 shows the standard unipolar binary connection dia- gram for the AD7943, AD7945 and AD7948. When V ac signal, the circuit performs two-quadrant multiplication. Resistors R1 and R2 allow the user to adjust the DAC gain error. With a specified gain error of 2 LSBs over temperature, these are not necessary in many applications ...
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... BIPOLAR OPERATION (Four-Quadrant Multiplication) Figure 15 shows the standard connection diagram for bipolar operation of the AD7943, AD7945 and AD7948. The coding is offset binary as shown in Table IV. When V the circuit performs four-quadrant multiplication. Resistors R1 and R2 are for gain error adjustment and are not needed in many applications where the device gain error specifications are adequate ...
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... Figure 19. AD7945 to MC68000 Interface STB1 AD7948 to Z80 Interface STB3 Figure 20 is the interface between the AD7948 and the 8-bit SRI bus of the Z80 processor. Three write operations are needed to LD1 load the DAC. The first two load the MS byte and the LS byte and the third brings the LDAC low to update the output ...
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... AD7943/AD7945/AD7948 16-Lead Plastic DIP (N-16) 0.840 (21.34) 0.745 (18.92 0.280 (7.11) 0.240 (6.10 PIN 1 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) 0.160 (4.06) MIN 0.115 (2.93) 0.100 0.070 (1.77) SEATING 0.022 (0.558) (2.54) PLANE 0.045 (1.15) 0.014 (0.356) BSC 20-Lead Plastic DIP (N-20) 1.060 (26.90) 0.925 (23.50 0.280 (7.11) 0.240 (6.10 PIN 1 0.060 (1.52) 0.015 (0.38) ...