AD420 Analog Devices, AD420 Datasheet
AD420
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AD420 Summary of contents
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... BOOST pin. The FAULT DETECT pin signals when an open circuit occurs in the loop. The on-chip voltage reference can be used to supply a precision + external components in addition to the AD420 or, if the Rev. H Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use ...
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... Using Multiple DACS with Fault Detect ................................. 11 Asynchronous Interface Using Optocouplers ........................ 11 Microprocessor Interface............................................................... 12 AD420-To-MC68HC11 (SPI Bus) Interface........................... 12 AD420 to Microwire Interface ................................................. 12 External Boost Function ........................................................... 13 AD420 Protection........................................................................... 14 Transient Voltage Protection .................................................... 14 Board Layout And Grounding ................................................. 14 ...
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... DIGITAL OUTPUTS FAULT DEFECT V (10 kΩ Pull-Up Resistor (10 kΩ Pull-Up Resistor 2 DATA OUT −0.8 mA 1.6 mA AD420-32 Version Min Typ 2 ±0.002 20 = +25° 4.995 5 4 ...
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... Total Output Error includes Offset and Gain Error. Total Output Error and Offset Error are with respect to the Full-Scale Output and are measured with an ideal +5 V reference. If the internal reference is used, the reference errors must be added to the Offset and Total Output Errors. 3 PSRR is measured by varying V from its maximum AD420-32 Version Min Typ Max ...
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... X θ = 75°C/W JA θ = 50°C/W JA ESD CAUTION Rev Page Inputs Range Range Select 2 Select 1 Operation X X Normal operation X X Output at bottom of span V–5 V range mA–20 mA range mA–20 mA range mA–24 mA range AD420 ...
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... DATA IN Serial Data Input. 10 DATA OUT Serial Data Output. In the 3-wire interface mode, this output can be used for daisy-chaining multiple AD420s. In the asynchronous mode a positive pulse will indicate a framing error after the stop-bit is received. 11 GND Ground (Common). 14 REF OUT +5 V Reference Output ...
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... The DAC output updates when the STOP bit is received. In the case of a framing error (the STOP bit sampled the AD420 will output a pulse at the DATA OUT pin one clock period wide during the clock period subsequent to sampling the STOP bit. The DAC output will not update if a framing error is detected ...
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... AD420 TERMINOLOGY Resolution For 16-bit resolution, 1 LSB = 0.0015% of the FSR. In the 4 mA–20 mA range 1 LSB = 244 nA. Integral Nonlinearity Analog Devices defines integral nonlinearity as the maximum deviation of the actual, adjusted DAC output from the ideal analog output (a straight line drawn from – 1 LSB) for any bit combination ...
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... FAULT DETECT output becomes active. Instead, the signal is generated when the internal amplifier in the output stage of the AD420 has less than approximately one volt remaining of drive capability (when the gate of the output PMOS transistor nearly reaches ground). ...
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... AD420. To prevent this voltage from exceeding the supply rails connect protective diodes between I and each of V and GND. OUT CC VOLTAGE-MODE OUTPUT Since the AD420 is a single supply device necessary to add an external buffer amplifier to the V OUT of bipolar output voltage ranges as shown in Figure 0.1µ ...
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... THREE-WIRE INTERFACE Figure 9 shows the AD420 connected in the 3-wire interface mode. The AD420 data input block contains a serial input shift register and a parallel latch. The contents of the shift register are controlled by the DATA IN signal and the rising edges of the CLOCK. Upon request of the LATCH pin the DAC and internal latch are updated from the shift register parallel outputs ...
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... Figure 11. The MOSI, SCK, and SS pins of the HC11 are respectively connected to the DATA IN, CLOCK, and LATCH pins of the AD420. The majority of the interfacing issues are done in the software initialization. A typical routine, such as the one shown below, begins by initializing the state of the various SPI data and control registers ...
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... Figure 13. External Boost Configuration The external boost capability has been developed for those users who may wish to use the AD420, in the SOIC package, at the extremes of the supply voltage, load current, and temperature range. The PDIP package (because of its lower ...
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... GND Figure 15. Output Transient Voltage Protection BOARD LAYOUT AND GROUNDING The AD420 ground pin, designated GND, is the high quality ground reference point for the device. Any external loads on the REF OUT and V this reference point. Analog and digital ground currents should not share a common path ...
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... AD420AN-32 −40°C to +85° C AD420ANZ-32 −40°C to +85° C AD420AR-32 −40°C to +85° C AD420AR-32-REEL −40°C to +85° C AD420ARZ-32 −40°C to +85° C AD420ARZ-32-REEL −40°C to +85° RoHS Compliant Part. 1.280 (32.51) 1.250 (31.75) 1.230 (31.24) 13 0.280 (7.11) 0.250 (6.35) ...
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... AD420 NOTES ©1999–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00494-0-1/11(H) Rev Page ...