ADA4062-2 Analog Devices, ADA4062-2 Datasheet
ADA4062-2
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ADA4062-2 Summary of contents
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... The ADA4062-2 and ADA4062-4 are dual and quad JFET-input amplifiers with industry-leading performance. They offer lower power, offset voltage, drift, and ultralow bias current. The ADA4062-2 B grade (SOIC package) features a typical low offset voltage of 0.5 mV, an offset drift of 5 μV/°C, and a bias current of 2 pA. ...
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... ADA4062-2/ADA4062-4 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Pin Configurations ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 Power Sequencing ........................................................................ 5 REVISION HISTORY 2/10—Rev Rev. B Added 16-Lead LFCSP Package........................................ Universal Changes to Features Section, General Description Section, and Table 1 ................................................................................................ 1 Changes to Offset Voltage Drift Parameter, Table 2 .................... 3 Changes to Table 4 ...
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... 25°C, unless otherwise noted Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage B Grade (ADA4062-2, 8-Lead SOIC Only) A Grade Offset Voltage Drift Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio B Grade (ADA4062-2, 8-Lead SOIC Only) A Grade Large-Signal Voltage Gain ...
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... ADA4062-2/ADA4062-4 Parameter NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Symbol Conditions kHz kHz n Rev Page Min Typ Max Unit 1.5 μV p-p 36 nV/√Hz 5 fA/√Hz ...
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... LFCSP POWER SEQUENCING The supply voltages of the op amps must be established simultaneously with, or before, any input signals are applied. If this is not possible, the input current must be limited to 10 mA. ESD CAUTION Rev Page ADA4062-2/ADA4062-4 θ θ Unit JA JC 120 45 ° ...
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... V (mV) OS Figure 8. Input Offset Voltage Distribution 40 ADA4062-2 ONLY V = ±15V SY –40°C ≤ BASED ON 200 OP AMPS – TCV (µV/°C) OS Figure 9. Input Offset Voltage Drift Distribution ...
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... Figure 14. Input Offset Voltage vs. Common-Mode Voltage 10000 1000 100 10 1 0.1 100 125 – –12 –10 Figure 16. Input Bias Current vs. Common-Mode Voltage Rev Page ADA4062-2/ADA4062 ±15V SY –12 –9 –6 – ( ±15V SY – ...
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... ADA4062-2/ADA4062 ± – – V– OL 0.1 0.01 0.1 1 LOAD CURRENT (mA) Figure 17. Output Voltage to Supply Rail vs. Load Current 220 200 +85°C 180 160 140 120 100 SUPPLY VOLTAGE (±V) Figure 18. Supply Current/Amp vs. Supply Voltage 2 ...
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... V = ± –10 –20 10M 100M 10 1000 100 10 1 0.1 1M 10M 100 Rev Page ADA4062-2/ADA4062 PHASE GAIN 10k 100k 1M 10M FREQUENCY (Hz) Figure 26. Open-Loop Gain and Phase vs. Frequency +100 + 100 1k 10k 100k ...
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... ADA4062-2/ADA4062-4 100 100 1k 10k 100k FREQUENCY (Hz) Figure 29. CMRR vs. Frequency 120 100 PSRR– –20 10 100 1k 10k FREQUENCY (Hz) Figure 30. PSRR vs. Frequency ± 10kΩ 100 C (pF) L Figure 31. Small-Signal Overshoot vs. Load Capacitance V = ± ...
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... INPUT 0 OUTPUT TIME (2µs/DIV) Figure 37. Negative Overload Recovery ± – –2 –4 –6 Rev Page ADA4062-2/ADA4062 ±15V 20V p 10kΩ 100pF L TIME (10µs/DIV) Figure 38. Large-Signal Transient Response V = ±15V SY ...
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... ADA4062-2/ADA4062-4 2 INPUT 0 –2 OUTPUT TIME (2µs/DIV) Figure 41. Positive Overload Recovery INPUT OUTPUT ERROR BAND V = ± 100pF 10kΩ L TIME (2µs/DIV) Figure 42. Positive Settling Time to 0.1% INPUT OUTPUT ERROR BAND TIME (2µs/DIV) Figure 43. Negative Settling Time to 0. ± ...
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... p-p IN – 10kΩ L ADA4062-2 ONLY – –60 –80 –100 –120 –140 –160 100 1k 10k FREQUENCY (Hz) Figure 49. Channel Separation vs. Frequency (ADA4062-2 Only) 1000 V = ±15V SY 100 ±15V ±15V 10V p-p IN 1kΩ – 10kΩ ...
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... ADA4062-2/ADA4062 ± p-p IN – 10kΩ L ADA4062-4 ONLY –40 –60 –80 –100 –120 –140 –160 100 1k FREQUENCY (Hz) Figure 53. Channel Separation vs. Frequency (ADA4062-4 Only) 100 V = ± 1kHz R = 10kΩ 0.1 0.01 0.001 0.001 0.01 0.1 AMPLITUDE (V rms) Figure 54. THD + N vs. Amplitude ...
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... Figure 61, is amplified by a factor of 5 using the ADA4062-x. MICROPOWER INSTRUMENTATION AMPLIFIER The ADA4062 dual amplifier and is perfectly suited for applications that require lower supply currents. For supply voltages of ±15 V, the supply current per amplifier is 165 μA typical. The ADA4062-2 also offers a typical low offset voltage drift of 5 μ ...
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... ADA4062-2/ADA4062-4 PHASE REVERSAL Phase reversal occurs in some amplifiers when the input common- mode voltage range is exceeded. When the voltage driving the input to these amplifiers exceeds the maximum input common- mode voltage range, the output of the amplifiers changes polarity. Most JFET input amplifiers have phase reversal if either input exceeds the input common-mode range ...
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... SCHEMATIC –IN V+ +IN V– Figure 65. Simplified Schematic of the ADA4062-x Rev Page ADA4062-2/ADA4062-4 OUT ...
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... ADA4062-2/ADA4062-4 OUTLINE DIMENSIONS IDENTIFIER 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.20 DIA 0.60 0.55 0.50 SEATING PLANE 3.20 3.00 2.80 5. 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.15 0.23 6° 0.40 0.05 0.09 0° 0.25 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 66. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3 ...
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... TOP VIEW 0.40 0.30 0.80 0.75 0.05 MAX 0.70 0.02 NOM SEATING PLANE 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. Figure 70. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ × Body, Very Very Thin Quad (CP-16-22) Dimensions shown in millimeters Rev Page ADA4062-2/ADA4062-4 0.20 0.09 0.75 8° 0.60 0° 0.45 0.30 0.23 0. EXPOSED 1.75 PAD 1 ...
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... ADA4062-2ARZ-R7 −40°C to +125°C ADA4062-2ARZ-RL −40°C to +125°C ADA4062-2BRZ −40°C to +125°C ADA4062-2BRZ-R7 −40°C to +125°C ADA4062-2BRZ-RL −40°C to +125°C ADA4062-2ACPZ-R2 −40°C to +125°C ADA4062-2ACPZ-RL −40°C to +125°C ADA4062-2ACPZ-R7 −40°C to +125°C ADA4062-4ARUZ − ...