ADA4817-2 Analog Devices, ADA4817-2 Datasheet - Page 17

• Manufacturer Part Number: ADA4817-2
• Description: Low Noise, 1 GHz FastFET Op Amps
• Manufacturer: Analog Devices

Specifications of ADA4817-2

• -3db Bandwidth: 1.05GHz
• Slew Rate: 870V/µs
• Vos: 2mV
• Ib: 2pA
• # Opamps Per Pkg: 2
• Input Noise (nv/rthz): 4nV/rtHz
• Vcc-vee: 5V to 10V
• Isy Per Amplifier: 21mA
• Packages: CSP

LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
Laying out the PCB is usually the last step in the design process
and often proves to be one of the most critical. A brilliant design
can be rendered useless because of poor layout. Because the
ADA4817-1/ADA4817-2 can operate into the RF frequency
spectrum, high frequency board layout considerations must
be taken into account. The PCB layout, signal routing, power
supply bypassing, and grounding all must be addressed to
ensure optimal performance.
SIGNAL ROUTING
The ADA4817-1/ADA4817-2 feature the new low distortion
pinout with a dedicated feedback pin that allows a compact
layout. The dedicated feedback pin reduces the distance from
the output to the inverting input, which greatly simplifies the
routing of the feedback network.
When laying out the ADA4817-1/ADA4817-2 as a unity-gain
amplifier, it is recommended that a short, but wide, trace be
placed between the dedicated feedback pins, and the inverting
input to the amplifier be used to minimize stray parasitic
inductance.
To minimize parasitic inductances, use ground planes under
high frequency signal traces. However, remove the ground
plane from under the input and output pins to minimize the
formation of parasitic capacitors, which degrades phase margin.
Signals that are susceptible to noise pickup should be run on
the internal layers of the PCB, which can provide maximum
shielding.
POWER SUPPLY BYPASSING
Power supply bypassing is a critical aspect of the PCB design
process. For best performance, the ADA4817-1/ADA4817-2
power supply pins need to be properly bypassed.
A parallel connection of capacitors from each of the power
supply pins to ground works best. Paralleling different values
and sizes of capacitors helps to ensure that the power supply
pins see a low ac impedance across a wide band of frequencies.
This is important for minimizing the coupling of noise into the
amplifier. Starting directly at the power supply pins, place the
smallest value and sized component on the same side of the
board as the amplifier, and as close as possible to the amplifier,
and connect it to the ground plane. Repeat this process for the
next largest value capacitor. It is recommended that a 0.1 μF
ceramic, 0508 case be used for the ADA4817-1/ADA4817-2.
The 0508 offers low series inductance and excellent high
frequency performance. The 0.1 μF provides low impedance at
high frequencies. Place a 10 μF electrolytic capacitor in parallel
with the 0.1 μF. The 10 μF capacitor provides low ac impedance
at low frequencies. Smaller values of electrolytic capacitors can
be used depending on the circuit requirements. Additional
smaller value capacitors help to provide a low impedance path
for unwanted noise out to higher frequencies but are not always
necessary.
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Placement of the capacitor returns (grounds) is also important.
Returning the capacitors’ grounds close to the amplifier load is
critical for distortion performance. Keeping the capacitors distance
short but equal from the load is optimal for performance.
In some cases, bypassing between the two supplies can help
to improve PSRR and to maintain distortion performance in
crowded or difficult layouts. This is another option to improve
performance.
Minimizing the trace length and widening the trace from the
capacitors to the amplifier reduces the trace inductance. A series
inductance with the parallel capacitance can form a tank circuit,
which can introduce high frequency ringing at the output. This
additional inductance can also contribute to increased distortion
due to high frequency compression at the output. The use of
vias should be minimized in the direct path to the amplifier power
supply pins because vias can introduce parasitic inductance, which
can lead to instability. When required to use vias, choose multiple
large diameter vias because this lowers the equivalent parasitic
inductance.
GROUNDING
The use of ground and power planes is encouraged as a method
of providing low impedance returns for power supply and signal
currents. Ground and power planes can also help to reduce stray
trace inductance and to provide a low thermal path for the
amplifier. Do not use ground and power planes under any of
the pins. The mounting pads and the ground or power planes
can form a parasitic capacitance at the input of the amplifier. Stray
capacitance on the inverting input and the feedback resistor form
a pole, which degrades the phase margin, leading to instability.
Excessive stray capacitance on the output also forms a pole,
which degrades phase margin.
EXPOSED PADDLE
The ADA4817-1/ADA4817-2 feature an exposed paddle, which
lowers the thermal resistance by 25% compared to a standard
SOIC plastic package. The exposed paddle of the ADA4817-1/
ADA4817-2 floats internally which provides the maximum
flexibility and ease of use. It can be connected to the ground plane
or to the negative power supply plane. In cases where thermal
heating is not an issue, the exposed pad can be left floating.
The use of thermal vias or heat pipes can also be incorporated
into the design of the mounting pad for the exposed paddle.
These additional vias help to lower the overall junction-to-
ambient temperature (θ
the surface to which the exposed paddle of the amplifier is
soldered can greatly reduce the overall thermal resistance seen
by the ADA4817-1/ADA4817-2.
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ADA4817-1/ADA4817-2