AD813 Analog Devices, AD813 Datasheet - Page 14

• Manufacturer Part Number: AD813
• Description: Single Supply, Low Power Triple Video Amplifier
• Manufacturer: Analog Devices

Specifications of AD813

• -3db Bandwidth: 100MHz
• Slew Rate: 250V/µs
• Vos: 2mV
• Ib: 500nA
• # Opamps Per Pkg: 3
• Input Noise (nv/rthz): 3.5nV/rtHz
• Vcc-vee: 2.4V to 36V
• Isy Per Amplifier: 5.5mA
• Packages: DIP,LCC,SOIC

AD813
Printed Circuit Board Layout Guidelines
As with all wideband amplifiers, printed circuit board parasitics
can affect the overall closed-loop performance. Most important
for controlling the 0.1 dB bandwidth are stray capacitances at
the output and inverting input nodes. Increasing the space be-
tween signal lines and ground plane will minimize the coupling.
Also, signal lines connecting the feedback and gain resistors
should be kept short enough that their associated inductance
does not cause high frequency gain errors.
Power Supply Bypassing
Adequate power supply bypassing can be very important when
optimizing the performance of high speed circuits. Inductance
in the supply leads can (for example) contribute to resonant
circuits that produce peaking in the amplifier’s response. In
addition, if large current transients must be delivered to a load,
then large (greater than 1 F) bypass capacitors are required to
produce the best settling time and lowest distortion. Although
0.1 F capacitors may be adequate in some applications, more
elaborate bypassing is required in other cases.
When multiple bypass capacitors are connected in parallel, it is
important to be sure that the capacitors themselves do not form
resonant circuits. A small (say 5 ) resistor may be required in
series with one of the capacitors to minimize this possibility.
As discussed below, power supply bypassing can have a signifi-
cant impact on crosstalk performance.
Achieving Low Crosstalk
Measured crosstalk from the output of Amplifier 2 to the input
of Amplifier 1 of the AD813 is shown in Figure 40. All other
crosstalk combinations, (from the output of one amplifier to the
input of another), are a few dB better than this due to the addi-
tional distance between critical signal nodes.
–100
–110
Figure 40. Worst Case Crosstalk vs. Frequency
–10
–20
–30
–40
–50
–60
–70
–80
–90
100k
1M
FREQUENCY – Hz
10M
R
L
= 150
100M
–14–
A carefully laid-out PC board should be able to achieve the level
of crosstalk shown in the figure. The most significant contribu-
tors to difficulty in achieving low crosstalk are inadequate power
supply bypassing, overlapped input and/or output signal paths,
and capacitive coupling between critical nodes.
The bypass capacitors must be connected to the ground plane at
a point close to and between the ground reference points for the
loads. (The bypass of the negative power supply is particularly
important in this regard.) This requires careful planning as
there are three amplifiers in the package, and low impedance
signal return paths must be provided for each load. (Using a
parallel combination of 1 F, 0.1 F, and 0.01 F bypass ca-
pacitors will help to achieve optimal crosstalk.)
The input and output signal return paths (to the bypass caps)
must also be kept from overlapping. Since ground connections
are not of perfectly zero impedance, current in one ground
return path can produce a voltage drop in another ground re-
turn path if they are allowed to overlap.
Electric field coupling external to (and across) the package can
be reduced by arranging for a narrow strip of ground plane to be
run between the pins (parallel to the pin rows). Doing this on
both sides of the board can reduce the high frequency crosstalk
by about 5 dB or 6 dB.
Driving Capacitive Loads
When used with the appropriate output series resistor, any load
capacitance can be driven without peaking or oscillation. In
most cases, less than 50
extremely flat frequency response. As illustrated in Figure 44,
the AD813 can be very attractive for driving large capacitive
loads. In this case, the AD813’s high output short circuit cur-
rent allows for a 150 V/ s slew rate when driving a 510 pF
capacitor.
Figure 41. Circuit for Driving a Capacitive Load
V
IN
R
R
T
G
AD813
+V
–V
11
4
R
S
S
is all that is needed to achieve an
F
1.0 F
0.1 F
0.1 F
1.0 F
R
S
C
L
R
L
V
O
REV. B