AD712 Analog Devices, AD712 Datasheet - Page 13
AD712
Manufacturer Part Number
AD712
Description
Precision, Low Cost, High Speed, BiFET Dual Op Amp
Manufacturer
Analog Devices
Datasheet
1.AD712.pdf
(20 pages)
Specifications of AD712
-3db Bandwidth
4MHz
Slew Rate
20V/µs
Vos
300µV
Ib
25pA
# Opamps Per Pkg
2
Input Noise (nv/rthz)
16nV/rtHz
Vcc-vee
9V to 36V
Isy Per Amplifier
2.8mA
Packages
DIP,SOIC
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The photos of Figure 35 and Figure 36 show the dynamic
response of the AD712 in the settling test circuit of Figure 37.
100
0%
90
10
Figure 35. Settling Characteristics 0 V to +10 V Step
Upper Trace: Output of AD712 Under Test (5 V/Div)
Lower Trace: Amplified Error Voltage (0.01%/Div)
5V
5mV
(OR EQUIVALENT
FLAT TOP PULSE
GENERATION)
DYNAMICS
DATA
5109
V
IN
10kΩ
4.99kΩ
500ns
0.1µF
–
+
AD712
200Ω
–15V
1/2
10kΩ
+15V
5 TO 18pF
Figure 37. Settling Time Test Circuit
4.99kΩ
0.1µF
HP2835
5kΩ
Rev. H | Page 13 of 20
1.1kΩ
0.47µF
10pF
–15V +15V
+
–
V
OUT
1/2
The input of the settling time fixture is driven by a flat top pulse
generator. The error signal output from the false summing node
of A1 is clamped, amplified by A2, and then clamped again. The
error signal is thus clamped twice: once to prevent overloading
Amplifier A2 and then a second time to avoid overloading the
oscilloscope preamp. The Tektronix oscilloscope preamp type
7A26 was carefully chosen because it does not overload with
these input levels. Amplifier A2 needs to be a very high speed
FET-input op amp; it provides a gain of 10, amplifying the error
signal output of A1.
0.2 TO 0.6pF
10kΩ
0.47µF
5pF
100
0%
90
10
Figure 36. Settling Characteristics 0 V to −10 V Step
Upper Trace: Output of AD712 Under Test (5 V/Div)
Lower Trace: Amplified Error Voltage (0.01%/Div)
205Ω
5V
5mV
V
ERROR ×
HP2835
5
TEKTRONIX 7A26
OSCILLOSCOPE
PREAMP
INPUT SECTION
1MΩ
20pF
500ns
AD712