ADP8861 Analog Devices, ADP8861 Datasheet - Page 12

• Manufacturer Part Number: ADP8861
• Description: Charge Pump, 7-Channel Smart LED Driver with I2C Interface
• Manufacturer: Analog Devices

Specifications of ADP8861

• Vin Range: 2.5 to 5.5V
• Vout (v): 4.3 to 5.5
• Synchronous: No
• Package: 20-Lead LFCSP,20-Lead WLCSP
• Led Configuration: Parallel
• Topology: Capacitive
• I2c Support: Yes
• Max Iout (ma): 60mA
• Brightness Control: PWM
• Peak Efficiency (%): 89%
• Switching Frequency: 1.32MHz
• Over Volt Protection (v): 5.8V

ADP8861
POWER STAGE
Because typical white LEDs require up to 4 V to drive them,
some form of boosting is required over the typical variation in
battery voltage. The ADP8861 accomplishes this with a high
efficiency charge pump capable of producing a maximum I
of 240 mA over the entire input voltage range (2.5 V to 5.5 V).
Charge pumps use the basic principle that a capacitor stores
charge based on the voltage applied to it, as shown in the
following equation:
By charging the capacitors in different configurations, the
charge, and therefore the gain, can be optimized to deliver the
voltage required to power the LEDs. Because a fixed charging
and discharging combination must be used, only certain
multiples of gain are available. The ADP8861 is capable of
automatically optimizing the gain (G) from 1×, 1.5×, and 2×.
These gains are accomplished with two capacitors (labeled C1
and C2 in Figure 25) and an internal switching network.
In G = 1× mode, the switches are configured to pass VIN
directly to VOUT. In this mode, several switches are connected
in parallel to minimize the resistive drop from input to output.
In G = 1.5× and 2× modes, the switches alternatively charge
from the battery and discharge into the output. For G = 1.5×,
the capacitors are charged from V
V
OUT
Q = C × V
in parallel. For G = 2×, the capacitors are charged from V
NOTES
1. V
DMAX
IS THE CALCULATED GAIN DOWN TRANSITION POINT.
STANDBY
STARTUP
G = 1.5
G = 1
G = 2
EXIT
IN
in series and are discharged to
EXIT STANDBY
1
100µs (TYP)
Figure 26. State Diagram for Automatic Gain Selection
100µs (TYP)
100µs (TYP)
WAIT
VOU T > V
WAIT
WAIT
V
STARTUP:
0
IN
CHARGE
TO V
OUT(START)
OUT
OUT
Rev. A | Page 12 of 40
(1)
IN
MIN (V
MIN (V
MIN (V
D1:D7
in parallel and are discharged to V
modes, the switches are opened and the output is physically
isolated from the input.
Automatic Gain Selection
Each LED that is driven requires a current source. The voltage
on this current source must be greater than a minimum head-
room voltage (180 mV typical) to maintain accurate current
regulation. The gain is automatically selected based on the
minimum voltage (V
the device is placed into G = 1× mode and the output charges
to V
(180 mV), the gain is increased to the next step (G = 1.5×).
A 100 μs delay is allowed for the output to stabilize prior to
the next gain switching decision. If there remains insufficient
current sink headroom, then the gain is increased again to 2×.
Conversely, to optimize efficiency, it is not desirable for the
output voltage to be too high. Therefore, the gain reduces when
the headroom voltage is great enough. This point (labeled
V
lower gain still results in ample headroom for all the current
sinks. The entire cycle is illustrated in Figure 26.
Note that the gain selection criteria apply only to active current
sources. If current sources have been deactivated through an
I
voltages on the deactivated current sources are ignored.
2
C command (for example only five LEDs are used), then the
DMAX
0
D1:D7
) < V
D1:D7
IN
. If any V
0
HR(UP)
) < V
in Figure 26) is internally calculated to ensure that the
) < V
HR(UP)
DMAX
D1:D7
level is less than the required headroom
DX
0
0
) at all of the current sources. At startup,
MIN (V
D1:D7
OUT
) > V
in parallel. In certain fault
DMAX