ADM1169 Analog Devices, ADM1169 Datasheet
ADM1169
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... The ADM1169 Super Sequencer® configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1169 integrates a 12-bit ADC and four 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs ...
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... Writing to the DACs .................................................................. 24 Choosing the Size of the Attenuation Resistor....................... 24 DAC Limiting and Other Safety Features ............................... 24 Applications Diagram .................................................................... 25 Communicating with the ADM1169........................................... 26 Configuration Download at Power-Up................................... 26 Updating the Configuration ..................................................... 26 Updating the Sequencing Engine............................................. 27 Internal Registers........................................................................ 27 ...
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... The ADM1169 is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc ...
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... ADM1169 SPECIFICATIONS 3 14.4 V, VPx = 3 6.0 V, Table 1. Parameter POWER SUPPLY ARBITRATION VH, VPx VPx VH VDDCAP C VDDCAP POWER SUPPLY Supply Current VPx Additional Currents All PDOx FET Drivers On Current Available from VDDCAP DAC Supply Currents ADC Supply Current EEPROM Erase Current SUPPLY FAULT DETECTORS ...
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... Same range, independent of center point mV LSB Endpoint corrected LSB % μA μA pF μs mV Per 100 mV step with 50 pF load V No load mV Sourcing current −100 μA DACxMAX mV Sinking current +100 μA DACxMAX μF Capacitor required for decoupling, stability dB DC ADM1169 ...
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... ADM1169 Parameter PROGRAMMABLE DRIVER OUTPUTS High Voltage (Charge Pump) Mode (PDO1 to PDO6) Output Impedance OUTAVG Standard (Digital Output) Mode (PDO1 to PDO8 SINK R PULL- (VPx) SOURCE Three-State Output Leakage Current Oscillator Frequency DIGITAL INPUTS (VXx, A0, A1) ...
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... Table 3. Thermal Resistance −0 +6.5 V Package Type −0 32-Lead LQFP 5 V 40-Lead LFCSP 6 ESD CAUTION 7 V −0 +0.3 V ±5 mA ±20 mA 150°C −65°C to +150°C 215°C 2000 V Rev Page ADM1169 θ Unit JA 54 °C/W 26.5 °C/W ...
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... SMBus Data Pin. Bidirectional open drain requires external resistive pull-up. Rev Page PIN 1 30 PDO1 INDICATOR VX1 29 PDO2 2 VX2 3 28 PDO3 27 VX3 4 PDO4 ADM1169 VX4 5 26 PDO5 NC 6 TOP VIEW 25 PDO6 7 24 PDO7 VP1 (Not to Scale) VP2 8 23 PDO8 22 ...
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... V. Note that a capacitor must be connected between this pin and GND μF capacitor is recommended for this purpose. Supply Ground. Exposed Pad. This pad connect (NC). If possible, this pad should be soldered to the board for improved mechanical stability. Rev Page ADM1169 ...
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... ADM1169 TYPICAL PERFORMANCE CHARACTERISTICS (V) VP1 Figure 5. V vs. V VDDCAP (V) VH Figure 6. V vs. V VDDCAP 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 (V) VP1 Figure 7. I vs. V (VP1 as Supply) VP1 VP1 VP1 12 14 ...
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... LOAD 12000 10000 8000 6000 4000 2000 Figure 16. ADC Noise, Midcode Input, 10,000 Reads LOAD Rev Page ADM1169 1000 2000 3000 4000 CODE Figure 14. DNL for ADC 1000 2000 3000 4000 CODE Figure 15. INL for ADC 9894 25 81 ...
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... ADM1169 1 CH1 200mV M1.00µs CH1 756mV Figure 17. Transient Response of DAC Code Change into Typical Load 1 CH1 200mV M1.00µs CH1 Figure 18. Transient Response of DAC to Turn-On from High-Z State DAC 20kΩ BUFFER PROBE OUTPUT POINT 47pF DAC 100kΩ BUFFER 1V OUTPUT PROBE ...
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... A supply comparator chooses the highest input to provide the on-chip supply. There is minimal switching loss with this architecture (~0.2 V), resulting in the ability to power the ADM1169 from a supply as low as 3.0 V. Note that the supply on the VXx pins cannot be used to power the device. An external capacitor to GND is required to decouple the on-chip supply from noise ...
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... Table 6 shows the details of each input. PROGRAMMING THE SUPPLY FAULT DETECTORS The ADM1169 can have up to eight SFDs on its eight input channels. These highly programmable reset generators enable the supervision eight supply voltages. The supplies can be as low as 0 ...
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... VREF + – UV FAULT TYPE COMPARATOR SELECT Figure 23. Supply Fault Detector Block Maximum Hysteresis 425 mV 1.02 V 97.5 mV 212 mV 425 mV 97.5 mV Not applicable Rev Page ADM1169 INPUT PULSE LONGER THAN GLITCH FILTER TIMEOUT PROGRAMMED TIMEOUT INPUT OUTPUT OUTPUT ...
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... VXx input pins on the ADM1169 have dual functionality. The second function digital logic input to the device. Therefore, the ADM1169 can be configured for up to four digital inputs. These inputs are TTL-/CMOS-compatible inputs. Standard logic signals can be applied to the pins: RESET from reset generators, PWRGD signals, fault flags, manual resets, and so on ...
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... All of the internal registers in an unprogrammed ADM1169 device from the factory are set to 0. Because of this, the PDOx pins are pulled to GND by a weak (20 kΩ), on-chip, pull-down resistor. As the input supply to the ADM1169 ramps up on VPx or VH, all PDOx pins behave as follows: • ...
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... If VP2 is not okay State DIS3V3. PWRGD If VX1 is high State DIS2V5. MONITOR FAULT The ADM1169 offers state definitions. The signals monitored to indicate the status of the input pins are the outputs of the SFDs. WARNINGS The SE also monitors warnings. These warnings can be generated when the ADC readings violate their limit register value or when the secondary voltage monitors on VPx and VH are triggered ...
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... STATES EN3V3 10ms VP1 = 0 VP2 = 1 EN2V5 DIS3V3 20ms (VP1 + VP2 VX1 = 1 VP3 = 1 PWRGD DIS2V5 VP2 = 0 (VP1 + VP2 + VP3 VX1 = 1 VX1 = 1 FSEL1 (VP1 + VP2 VP3 = 0 FSEL2 VP2 = 0 Figure 28. Sample Application Flow Diagram DIS2V5 PWRGD FSEL1 ADM1169 FSEL2 ...
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... Each time the sequence engine enters that state, a fault record is written into EEPROM. The fault record provides a snapshot of the entire ADM1169 state at the point in time when the last state was exited, just prior to entering the designated black box write state. A fault record contains the following information: • ...
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... Typically, it takes write to the eight bytes of a fault record. If the ADM1169 is powered using supply on the VH pin, then a UV threshold can be set and used as the state machine trigger to start writing a fault record to EEPROM. The higher the ...
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... SE to determine what sequencing action the ADM1169 should take. Only one register is provided for each input channel. Therefore, either an undervoltage threshold or overvoltage threshold (but not both) can be set for a given channel. ...
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... This can help to decouple any noise picked up from the board. Decoupling to a ground local to the dc-to-dc converter is recommended. The ADM1169 can be commanded to margin a supply up or down over the SMBus by updating the values on the relevant DAC output. CLOSED-LOOP SUPPLY MARGINING A more accurate and comprehensive method of margining is to implement a closed-loop system (see Figure 33) ...
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... Maximum Voltage can make it very difficult for the DAC output buffers to be turned Output (V) on during normal system operation. The limit registers are among 0.902 the registers downloaded from EEPROM at startup. 1.102 1.302 1.552 Rev Page ADM1169 − DACOUT R3 . ...
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... PDO6 SYSTEM RESET PDO7 VX4 PDO8 3.3V OUT REFOUT DAC1 REFIN VCCP VDDCAP GND IN 10µF 10µF EN DC-TO-DC4 Figure 34. Applications Diagram Rev Page 12V OUT 5V OUT 3V OUT IN DC-TO-DC1 EN OUT 3.3V OUT IN DC-TO-DC2 EN OUT 1.25V OUT IN DC-TO-DC3 EN OUT 1.2V OUT 0.9V OUT OUT TRIM ADM1169 ...
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... RAM again, as described in the Option 3 section, restoring the ADM1169 to its original configuration. The topology of the ADM1169 makes this type of operation possible. The local, volatile registers (RAM) are all double-buffered latches. Setting Bit 0 of the UPDCFG register to 1 leaves the double buffered latches open at all times, allowing the registers to be updated continuously as they are written to ...
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... EEPROM. RAM for each state does not exist. The relevant alterations must be made to the 64-bit word, which is then uploaded directly to the EEPROM. INTERNAL REGISTERS The ADM1169 contains a large number of data registers. The principal registers are the address pointer register and the configuration registers. Address Pointer Register The address pointer register contains the address that selects one of the other internal registers ...
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... EEPROM. Therefore, access to the ADM1169 is restricted until the download is complete. Identifying the ADM1169 on the SMBus The ADM1169 has a 7-bit serial bus slave address (see Table 11). The device is powered up with a default serial bus address. The five MSBs of the address are set to 10011; the two LSBs are determined by the logical states of Pin A1 and Pin A0 ...
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... BUF P S SMBus PROTOCOLS FOR RAM AND EEPROM The ADM1169 contains volatile registers (RAM) and nonvolatile registers (EEPROM). User RAM occupies Address 0x00 to Address 0xDF; and the EEPROM occupies Address 0xF800 to Address 0xFBFF. Data can be written to and read from both the RAM and the EEPROM as single data bytes ...
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... The slave asserts ACK on SDA. 6. The master asserts a stop condition on SDA and the transaction ends. In the ADM1169, the send byte protocol is used for the following two purposes: • To write a register address to the RAM for a subsequent single byte read from the same address, or for a block read or a block write starting at that address, as shown in Figure 39 ...
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... In a block write operation, the master device writes a block of data to a slave device, as shown in Figure 45. The start address for a block write must have been set previously. In the ADM1169, a send byte operation sets a RAM address, and a write byte/word operation sets an EEPROM address as follows: 1 ...
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... EEPROM, a block write to the RAM/EEPROM block read from the RAM/EEPROM. This option enables the user to verify that the data received by or sent from the ADM1169 is correct. The PEC byte is an optional byte sent after the last data byte has been written to or read from the ADM1169. The protocol is the ...
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... INDICATOR 0.80 0.75 0.70 SEATING PLANE ORDERING GUIDE 1 Model Temperature Range ADM1169ASTZ −40°C to +85°C ADM1169ASTZ-RL7 −40°C to +85°C ADM1169ACPZ −40°C to +85°C ADM1169ACPZ-RL7 −40°C to +85°C EVAL-ADM1169LQEBZ RoHS Compliant Part. 0.75 1.60 MAX 0.60 0. 0.20 0.09 7° 3.5° 8 0° SEATING 0.10 MAX ...
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... ADM1169 NOTES Rev Page ...
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... NOTES Rev Page ADM1169 ...
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... ADM1169 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09475-0-4/11(0) Rev Page ...