ADP1111 Analog Devices, ADP1111 Datasheet - Page 12

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ADP1111

Manufacturer Part Number
ADP1111
Description
Micropower, Step-Up/Step-Down SW Regulator; Adjustable and Fixed 3.3 V, 5 V, 12 V
Manufacturer
Analog Devices
Datasheet

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ADP1111
This occurs in the step-up mode when the following condition is
met:
where DC is the ADP1111’s duty cycle. When this relationship
exists, the inductor current does not go all the way to zero
during the time that the switch is OFF. When the switch turns
on for the next cycle, the inductor current begins to ramp up
from the residual level. If the switch ON time remains constant,
the inductor current will increase to a high level (see Figure 24).
This increases output ripple and can require a larger inductor
and capacitor. By controlling switch current with the I
resistor, output ripple current can be maintained at the design
values. Figure 25 illustrates the action of the I
The internal structure of the I
Q1 is the ADP1111’s internal power switch that is paralleled by
sense transistor Q2. The relative sizes of Q1 and Q2 are scaled
so that I
internal 80 Ω resistor and through the R
resistors parallel the base-emitter junction of the oscillator-
disable transistor, Q3. When the voltage across R1 and R
exceeds 0.6 V, Q3 turns on and terminates the output pulse. If
only the 80 Ω internal resistor is used (i.e. the I
connected directly to V
1.5 A. Figure 6 gives R
200mA/div
200mA/div
Q2
is 0.5% of I
V
OUT
V
Q1
IN
LIM
IN
. Current flows to Q2 through an
), the maximum switch current will be
+ V
− V
Figure 25.
Figure 24.
values for lower current-limit values.
DIODE
SW
LIM
circuit is shown in Figure 26.
<
1 − DC
LIM
1
resistor. These two
LIM
LIM
circuit.
pin is
LIM
LIM
–12–
The delay through the current limiting circuit is approximately
1 μs. If the switch ON time is reduced to less than 3 μs, accuracy
of the current trip-point is reduced. Attempting to program a
switch ON time of 1 μs or less will produce spurious responses
in the switch ON time; however, the ADP1111 will still provide
a properly regulated output voltage.
PROGRAMMING THE GAIN BLOCK
The gain block of the ADP1111 can be used as a low-battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1111’s 1.25 V reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 300 μA.
Figure 27a shows the gain block configured as a low-battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in
the SET input causes large errors. A value of 33 kΩ for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
where V
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
Figure 27a. Setting the Low Battery Detector Trip Point
Figure 26. ADP1111 Current Limit Operation
V
LOBATT
BAT
V
IN
33k
ADP1111
is the desired low battery trip point. Since the
R2
R1
R1 =
72kHz
OSC
V
SET
1.25V
IN
REF
Q3
V
(EXTERNAL)
LOBATT
DRIVER
R
ADP1111
LIM
GND
V
1.25 V
IN
I
LIM
R1
R2
AO
− 1.25 V
R1= –––––––––
V
LB
200
Q2
80Ω
(INTERNAL)
I
Q1
= BATTERY TRIP POINT
V
5V
LB
35.1μA
R
47k
–1.25V
L
SW1
SW2
POWER
SWITCH
Q1
TO
PROCESSOR
REV. 0

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