LPC2458 NXP Semiconductors, LPC2458 Datasheet - Page 30

NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace

LPC2458

Manufacturer Part Number
LPC2458
Description
NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2458
Product data sheet
7.13.1 Features
7.14.1 Features
7.15.1 Features
7.13 10-bit ADC
7.14 10-bit DAC
7.15 UARTs
The LPC2458 contains one ADC. It is a single 10-bit successive approximation ADC with
eight channels.
The DAC allows the LPC2458 to generate a variable analog output. The maximum output
value of the DAC is V
The LPC2458 contains four UARTs. In addition to standard transmit and receive data
lines, UART1 also provides a full modem control handshake interface.
The UARTs include a fractional baud rate generator. Standard baud rates such as
115200 Bd can be achieved with any crystal frequency above 2 MHz.
10-bit successive approximation ADC
Input multiplexing among 8 pins
Power-down mode
Measurement range 0 V to V
10-bit conversion time  2.44 s
Burst conversion mode for single or multiple inputs
Optional conversion on transition of input pin or Timer Match signal
Individual result registers for each ADC channel to reduce interrupt overhead
10-bit DAC
Resistor string architecture
Buffered output
Power-down mode
Selectable output drive
16 B Receive and Transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
Fractional divider for baud rate control, auto baud capabilities and FIFO control
mechanism that enables software flow control implementation.
UART1 equipped with standard modem interface signals. This module also provides
full support for hardware flow control (auto-CTS/RTS).
All information provided in this document is subject to legal disclaimers.
i(VREF)
Rev. 4 — 1 September 2011
.
i(VREF)
Single-chip 16-bit/32-bit micro
LPC2458
© NXP B.V. 2011. All rights reserved.
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