P87LPC769 NXP Semiconductors, P87LPC769 Datasheet - Page 10

• Manufacturer Part Number: P87LPC769
• Description: The P87LPC769 is a 20-pin single-chip microcontroller designed forlow pin count applications demanding high-integration, low costsolutions over a wide range of performance requirements
• Manufacturer: NXP Semiconductors

Philips Semiconductors
SPECIAL FUNCTION REGISTERS
2002 Mar 12
ACC*
ADCON#*
AUXR1#
B*
CMP1#
CMP2#
DAC0#
DAC1#
DIVM#
DPTR:
I2CFG#*
I2CON#*
I2DAT#
IEN0*
IEN1#*
IP0*
IP0H#
IP1*
IP1H#
KBI#
P0*
P1*
P2*
P0M1#
P0M2#
DPH
DPL
Low power, low price, low pin count (20 pin)
microcontroller with 4 kB OTP 8-bit A/D, and DAC
Name
Accumulator
A/D Control
Auxiliary Function Register
B register
Comparator 1 control
register
Comparator 2 control
register
A/D Result/DAC0 output
value
DAC1 output value
CPU clock divide-by-M
control
Data pointer (2 bytes)
Data pointer high byte
Data pointer low byte
I
I
I
Interrupt enable 0
Interrupt enable 1
Interrupt priority 0
Interrupt priority 0 high byte
Interrupt priority 1
Interrupt priority 1 high byte
Keyboard Interrupt
Port 0
Port 1
Port 2
Port 0 output mode 1
Port 0 output mode 2
2
2
2
C configuration register
C control register
C data register
Description
Address
C8h/WR
D8h/WR
D9h/WR
C8h/RD
D8h/RD
D9h/RD
SFR
ACh
ADh
C5h
C6h
E0h
A2h
F0h
95h
83h
82h
A8h
E8h
B8h
B7h
F8h
F7h
86h
80h
90h
A0h
84h
85h
C0h
SLAVEN
SLAVEN
(P0M1.7)
(P0M2.7)
ENADC
DAC0
RDAT
RDAT
XDAT
PTIH
CXA
MSB
KBF
ETI
PTI
E7
C7
CF
DF
AF
EA
EF
BF
FF
A7
F7
87
T1
97
–
–
–
–
–
MASTRQ
MASTRQ
(P0M1.6)
(P0M2.6)
ENDAC1
PWDH
CMP1
DAC1
EWD
PWD
BOD
IDLE
ATN
C6
CE
DE
AE
EE
BE
FE
E6
F6
A6
86
96
–
–
0
x
–
–
–
–
7
CMPREF
(P0M1.5)
(P0M2.5)
ENDAC0
CLRTI
DRDY
PBOH
PC1H
CDR
EBO
PBO
CE1
CE2
EC1
PC1
RST
BOI
CD
DD
AD
ED
BD
E5
C5
FD
A5
F5
85
95
0
0
x
–
Bit Functions and Addresses
(P0M1.4)
(P0M2.4)
TIRUN
TIRUN
CIN1A
CARL
PADH
INT1
EAD
PSH
PAD
ADCI
CP1
CP2
ARL
CC
DC
AC
EC
BC
E4
C4
ES
PS
FC
A4
F4
84
94
–
0
–
x
(P0M1.3)
(P0M2.3)
CIN1B
SRST
CSTR
PT1H
ADCS
INT0
CN1
CN2
STR
ET1
PT1
CB
DB
AB
EB
BB
E3
C3
F3
FB
A3
83
93
–
–
0
x
–
–
–
–
(P0M1.2)
(P0M2.2)
CIN2A
RCCLK
CSTP
PX1H
PC2H
OE1
OE2
STP
EC2
PC2
EX1
PX1
C2
CA
DA
AA
EA
BA
E2
F2
FA
82
92
T0
A2
0
–
–
0
x
–
(P0M1.1)
(P0M2.1)
MASTER
CIN2B
AADR1
XSTR
PKBH
PT0H
CO1
CO2
EKB
PKB
CT1
CT1
ET0
PT0
RxD
E1
C1
F1
C9
D9
A9
E9
B9
F9
A1
X1
81
91
–
0
P87LPC769
x
(P0M1.0)
(P0M2.0)
CMP2
AADR0
CMF1
CMF2
XSTP
PX0H
Preliminary data
LSB
PI2H
DPS
CT0
CT0
EX0
PX0
TxD
EI2
PI2
E0
C0
F0
C8
D8
A8
E8
B8
F8
A0
X2
80
90
–
0
x
00h
00h
02h
00h
00h
00h
00h
00h
00h
00h
00h
00h
80h
80h
00h
00h
00h
00h
00h
00h
00h
Note 2
Note 2
Note 2
00h
00H
Reset
Value
1
1
1
1
1
1
1
1
1
1