MPT612 NXP Semiconductors, MPT612 Datasheet - Page 16

• Manufacturer Part Number: MPT612
• Description: The MPT612, the first dedicated IC for performing the Maximum Power Point Tracking (MPPT) function, is designed for use in applications that use solar photovoltaic (PV) cells or in fuel cells
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MPT612
Product data sheet
7.17.3.1 Wake-up timer description
7.17.3 Reset and wake-up timer
The output divider can be set to divide by a factor of 2, 4, 8 or 16 to produce the output
clock. The minimum output divider value is 2 which gives a PLL output with a 50 % duty
cycle. The PLL is turned off and bypassed after a device reset and can be enabled using
the software. The program must configure and activate the PLL, wait for the PLL to lock
and then connect to the PLL as a clock source. The PLL settling time is 100 µs.
The MPT612 reset has two sources; one from the RST pin and the other from the
watchdog reset.
The RST pin is a Schmitt trigger input pin with an additional glitch filter. Assertion of
device reset by any source starts the wake-up timer (see
the internal device reset to remain asserted until:
When the internal reset is removed, all of the processor core and peripheral registers are
been re-initialized to their reset values and the core begins executing from the reset
vector (address 0).
The wake-up timer ensures that the oscillator and other analog functions required for
device operation are fully functional before the processor is allowed to execute
instructions. This is important during power on, all types of reset and whenever any of the
functions are turned off. Since the oscillator and other functions are turned off during
Power-down and in Deep power-down mode, a wake-up of the core from these modes
makes use of the wake-up timer.
The wake-up timer monitors the crystal oscillator to check when it is safe to begin code
execution. A stabilization time interval is required for the oscillator to produce a signal of
sufficient amplitude to drive the clock logic when power is applied to the device or an
event causes the chip to exit Power-down mode. The amount of time depends on many
factors, including:
• the external reset is deasserted
• the oscillator is running
• a fixed number of clocks have passed
• the on-chip flash controller has completed its initialization
• the rate of V
• the type of crystal, its electrical characteristics (if a quartz crystal is used), as well as
• the characteristics of the oscillator under the existing ambient conditions
any other external circuitry (e.g., capacitors),
All information provided in this document is subject to legal disclaimers.
DD
ramp up (in the case of power on),
Rev. 2 — 14 September 2010
Maximum power point tracking IC
Section
7.17.3.1). This causes
© NXP B.V. 2010. All rights reserved.
MPT612
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