PSMN1R7-25YLC NXP Semiconductors, PSMN1R7-25YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN1R7-25YLC

Manufacturer Part Number
PSMN1R7-25YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN1R7-25YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
R
(mΩ)
DS on
8
6
4
2
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
20
Q
GS1
I
Q
D
GS
40
Q
GS2
2.6
Q
G(tot)
60
Q
GD
N-channel 25 V 1.9 mΩ logic level MOSFET in LFPAK using NextPower
V
80
GS
All information provided in this document is subject to legal disclaimers.
003a a f 815
003aaa508
2.8
(V) =
I
D
(A)
3.0
3.5
4.5
10
100
Rev. 01 — 2 May 2011
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
(V)
a
GS
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
20
0
PSMN1R7-25YLC
V
GS
V
60
40
(V) = 10V
DS
12V
= 5V
20V
120
60
© NXP B.V. 2011. All rights reserved.
Q
003a a f 816
003a a f 822
4.5V
G
T
j
(nC)
(°C)
180
80
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