PSMN2R6-30YLC NXP Semiconductors, PSMN2R6-30YLC Datasheet - Page 10
PSMN2R6-30YLC
Manufacturer Part Number
PSMN2R6-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
1.PSMN2R6-30YLC.pdf
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PSMN2R6-30YLC
Product data sheet
Fig 16. Input, output and reverse transfer capacitances
Fig 18. Reverse recovery timing definition
(pF)
C
10
10
10
4
3
2
10
as a function of drain-source voltage; typical
values
-1
1
10
(A)
I
D
0
N-channel 30 V 2.8mΩ logic level MOSFET in LFPAK using NextPower
V
All information provided in this document is subject to legal disclaimers.
003a a f 669
C
C
DS
C
is s
rs s
os s
(V)
10
2
Rev. 01 — 2 May 2011
t
a
Fig 17. Source current as a function of source-drain
t
rr
(A)
I
S
100
80
60
40
20
t
b
0
voltage; typical values
0
I
RM
003a a f 444
0.25 I
t (s )
R M
0.3
PSMN2R6-30YLC
T
j
= 150 C
0.6
T
0.9
j
= 25 C
© NXP B.V. 2011. All rights reserved.
003a a f 672
V
S D
(V)
1.2
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