PSMN2R6-30YLC NXP Semiconductors, PSMN2R6-30YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN2R6-30YLC

Manufacturer Part Number
PSMN2R6-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN2R6-30YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
R
(mΩ)
DS on
12
10
8
6
4
2
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
Q
25
GS1
I
Q
D
GS
Q
2.8
GS2
50
Q
G(tot)
Q
GD
75
V
N-channel 30 V 2.8mΩ logic level MOSFET in LFPAK using NextPower
GS
3.0
5.0
All information provided in this document is subject to legal disclaimers.
003a a f 664
003aaa508
(V) = 3.5
I
D
(A)
4.5
10
100
Rev. 01 — 2 May 2011
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
a
(V)
GS
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
10
0
PSMN2R6-30YLC
20
V
60
DS
15V
= 6V
30
24V
V
GS
= 10V
120
© NXP B.V. 2011. All rights reserved.
40
003a a f 665
003a a f 671
T
Q
j
4.5V
G
( C)
(nC)
180
50
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