STR751FR2 STMicroelectronics, STR751FR2 Datasheet - Page 39
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STR751FR2
Manufacturer Part Number
STR751FR2
Description
ARM7TDMI-S™ 32-BIT MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN
Manufacturer
STMicroelectronics
Datasheet
1.STR755FV2.pdf
(84 pages)
Specifications of STR751FR2
Smart Low Power Modes
SLOW, WFI, STOP and STANDBY with backup registers
Conversion Time
min. 3.75 μs
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Typical power consumption
The following measurement conditions apply to
In RUN mode:
●
●
●
●
In WFI Mode:
●
In SLOW mode:
●
In SLOW-WFI mode:
●
In STOP mode:
●
In STANDBY mode:
●
●
Program is executed from Flash (except if especially mentioned). The program consists
of an infinite loop. When f
A standard 4 MHz crystal source is used.
In all cases the PLL is used to multiply the frequency.
All measurements are done in the single supply scheme with internal regulators used
(see
In WFI Mode the measurement conditions are similar to RUN mode (OSC4M and PLL
enabled). In addition, the Flash can be disabled depending on burst mode activation:
–
–
The same program as in RUN mode is executed from Flash. The CPU is clocked by the
FREEOSC, OSC4M, LPOSC or OSC32K. Only EXTIT peripheral is enabled in the
MRCC_PCLKEN register.
In SLOW-WFI, the measurement conditions are similar to SLOW mode (CPU clocked
by a low frequency clock). In addition, the LP_PARAM14 bit is set (FLASH is OFF). The
WFI routine itself is executed from SRAM (it is not allowed to execute a WFI from the
internal FLASH)
Several measurements are given: in the single supply scheme with internal regulators
used (see
Three measurements are given:
–
–
–
STANDBY mode is only supported in the single supply scheme (see
For AHB frequencies greater than 32 MHz, burst mode is activated and the Flash
is kept enabled by setting the WFI_FLASH_EN bit (this bit cannot be reset when
burst mode is activated).
For AHB frequencies less than or equal to 32 MHz, burst mode is deactivated,
WFI_FLASH_EN is reset and the LP_PARAM14 bit is set (Flash is disabled in WFI
mode).
The RTC is disabled, only the consumption of the LPVREG and RSM remain
(almost no leakage currents)
The RTC is running, clocked by a standard 32.768 kHz crystal.
The RTC is running, clocked by the internal Low Power RC oscillator (LPOSC)
Figure
Figure
12)
12): and in the dual supply scheme (see
HCLK
> 32 MHz, burst mode is activated.
Table
15,
Table 16
Figure
and
Electrical parameters
13).
Table
Figure
17.
12)
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