ST72361J6 STMicroelectronics, ST72361J6 Datasheet - Page 66

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ST72361J6

Manufacturer Part Number
ST72361J6
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72361J6

Hdflash Endurance
100 cycles, data retention 40 years at 85°C
5 Power Saving Modes
Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow
ST72361
PWM AUTO-RELOAD TIMER (Cont’d)
Figure 46. input Capture Timing Diagram, f
External Interrupt Capability
This mode allows the Input capture capabilities to
be used as external interrupt sources. The inter-
rupts are generated on the edge of the ARTICx
signal.
The edge sensitivity of the external interrupts is
programmable (CSx bit of ARTICCSR register)
and they are independently enabled through CIEx
bits of the ARTICCSR register. After fetching the
interrupt vector, the CFx flags can be read to iden-
tify the interrupt source.
During HALT mode, the external interrupts can be
used to wake up the micro (if the CIEx bit is set). In
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ICRx REGISTER
ICRx REGISTER
ARTICx PIN
ARTICx PIN
COUNTER
COUNTER
CFx FLAG
CFx FLAG
f
f
COUNTER
COUNTER
f
f
CPU
CPU
03h
03h
xxh
xxh
ICAP SAMPLED
COUNTER
ICAP SAMPLED
04h
04h
this case, the interrupt synchronization is done di-
rectly on the ARTICx pin edge
Figure 47. ART External Interrupt in Halt Mode
= f
CPU
ARTICx PIN
CFx FLAG
/ 4
04h
INTERRUPT
05h
05h
05h
(Figure
INTERRUPT
INTERRUPT
47).
t
t
t

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