MAX9260 Maxim, MAX9260 Datasheet - Page 30

• Manufacturer Part Number: MAX9260
• Description: The MAX9259/MAX9260 chipset presents Maxim's gigabit multimedia serial link (GMSL) technology
• Manufacturer: Maxim

Gigabit Multimedia Serial Link with Spread
Spectrum and Full-Duplex Control Channel
Figure 24. UART Protocol for Base Mode
Figure 25. UART Data Format for Base Mode
Figure 26. SYNC Byte (0x79)
should assume there was an error in the packet when the
slave device receives it, or that an error occurred during
the response from the slave device. In base mode, the
FC must keep the UART Tx/Rx lines high for 16 bit times
before starting to send a new packet.
As shown in Figure 28, the remote-side device converts
the packets going to or coming from the peripherals from
the UART format to the I
remote device removes the byte number count and adds
or receives the ACK between the data bytes of I
I
30
2
C’s data rate is the same as the UART data rate.
START
_____________________________________________________________________________________
D0
1
D1
0
START
D2
0
SYNC
SYNC
D3
1
2
D0
FRAME 1
C format and vice versa. The
D4
DEV ADDR + R/W
1
DEV ADDR + R/W
D5
1
D1
D6
MASTER WRITES TO SLAVE
1
STOP
REG ADDR
REG ADDR
D2
D7
0
PARITY STOP
START
2
D3
MASTER WRITES TO SLAVE
C. The
NUMBER OF BYTES
NUMBER OF BYTES
1 UART FRAME
READ DATA FRMAT
WRITE DATA FORMAT
D4
FRAME 2
Figure 27. ACK Byte (0xC3)
The MAX9259/MAX9260 UART-to-I
faces with devices that do not require register address-
es, such as the MAX7324 GPIO expander. Change the
communication method of the I
I2CMETHOD bit. I2CMETHOD = 1 sets command-byte-
only mode, while I2CMETHOD = 0 sets normal mode
where the first byte in the data stream is the register
address. In this mode, the I
ister address byte and directly reads/writes the subse-
quent data bytes (Figure 29).
MASTER READS FROM SLAVE
START
D5
BYTE 1
ACK
D0
1
D6
D1
1
STOP
BYTE 1
Interfacing Command-Byte-Only
D2
0
D7
BYTE N
START
MASTER READS FROM SLAVE
D3
0
PARITY
D4
0
2
C master ignores the reg-
BYTE N
D5
ACK
0
FRAME 3
2
C master using the
STOP
2
D6
1
C conversion inter-
D7
1
I
2
C Devices
PARITY STOP